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PDF AK7736B Data sheet ( Hoja de datos )

Número de pieza AK7736B
Descripción Audio/HF DSP
Fabricantes AKM 
Logotipo AKM Logotipo



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[AK7736B]
AK7736B
Audio/HF DSP with 2Ch SRC
1. General Description
The AK7736B is a highly integrated audio digital signal processor with integrated 2ch SRC. It includes
internal memories for digital audio processing, that allows surround effect process, time alignment and
parametric equalizing. Moreover, the AK7736B can process both data and filter coefficients as floating point
data so that high accuracy IIR/FIR filter performance can be achieved easily. The AK7736B can operate a
hands-free software by AKM as well as sound processing, by programs downloaded via the microprocessor
interface.
2. Features
DSP Block
- Word length: 24-bit
- Machine Cycle: 8.1 ns (2560step/fs; fs = 48kHz)
- Step
fs=48kHz: Maximum 2560 step
fs=8kHz: Maximum 15360step
fs=16kHz: Maximum 7680step
- Multiplication: 20 x 24 44-bit (Double precision arithmetic available)
- Divider 20 / 20 → 20-bit (floating point normalization function)
- ALU: 48-bit arithmetic and logic operation (overflow margin 4-bit)
- Shift: Multiple DBUS ±15bit Shift with indirect shifting function
- Program RAM (PRAM): 6144word x 36-bit
- Coefficient RAM (CRAM): 4096word x 24-bit
- Data RAM (DRAM): 4096 x 24-bit (Variable Bank Size)
- Offset Register (OFREG): 32word x 15-bit
- Delay RAM (DLRAM): 16384word x 24-bit (Variable Bank Size)
- Register: 48-bit × 4 (ACC) [ALU]
24-bit × 12 (TMP) [DBUS connection]
24-bit × 6 level stack (PTMP) [DBUS connection]
□ Stereo 24-bit SRC
-SRC: FSI=8kHz to 96kHz / FSO=8kHz to 96kHz (FSO/FSI = 0.167 to 6.0)
□ Mono 24-bit Simple SRC
-FSCONV: FSI=44.1kHz to 48kHz / FSO=8kHz to 16kHz
Digital Interface Input/Output
- 8ch Serial Data Inputs
- 8ch Serial Data Outputs
- Sampling Frequency: 8kHz to 96kHZ
Microcontroller Interface: SPI, I2CBUS (400kHz Fast-Mode)
PLL
□ Power Supply
-VDD: 3.0 to 3.6V typ 3.3V (Internal Regulator)
-TVDD: 1.7 to 3.6V (1~8pin)
Operating Temperature Range: -40°C to 85°C
Package: 48-pin LQFP
MS1562-E-00-PB
-1-
2013/10

1 page




AK7736B pdf
5. Pin Configurations and Functions
Ordering Guide
AK7736BVQ -40 to +85C 48-pin LQFP (0.5mm pitch)
AKD7736B Evaluation Board for AK7736B
Pin Layout
AK7736BLQFP
[AK7736B]
SDIN3
VSS
VDD
BITCLKI3
LRCLKI3
SDIN2C
JX0
EXPDN
VDD
TESTI2
VSS
LFLT
37
38
39
40
41
42
43
44
45
46
47
48
48pin LQFP
(TOP VIEW)
24 CLKO
23 BITCLKO
22 LRCLKO
21 SDIN2A
20 PDN
19 I2CSEL
18 VDD
17 VSS
16 RDY
15 SDOUT2A
14 SDOUT3
13 SDOUT4
Note) **** is an Internal pull-down pin. ***: Pin Name
PIN
Input
Output
I/O
Power
MS1562-E-00-PB
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2013/10

5 Page





AK7736B arduino
[AK7736B]
9. Digital Filter Characteristics
SRC Block
(Ta= -40°C to 85°C, VDD=3.0 to 3.6V, TVDD=1.7 to 3.6V, VSS =0V)
Parameter
Symbol
min
typ max Unit
Passband -0.01dB
0.980FSO/FSI6.000
PB
0
0.4583FSI kHz
0.900FSO/FSI<0.990
PB
0
0.4167FSI kHz
0.533FSO/FSI<0.909
PB
0
0.2182FSI kHz
0.490FSO/FSI<0.539
PB
0
0.2177FSI kHz
0.450FSO/FSI<0.495
PB
0
0.1948FSI kHz
0.225FSO/FSI<0.455
PB
0
0.1312FSI kHz
Passband -0.50dB
0.167FSO/FSI<0.227
PB
0
0.0658FSI kHz
Stopband
0.980FSO/FSI6.000
SB 0.5417FSI
kHz
0.900FSO/FSI<0.990 SB 0.5021FSI
kHz
0.533FSO/FSI<0.909 SB 0.2974FSI
kHz
0.490FSO/FSI<0.539 SB 0.2812FSI
kHz
0.450FSO/FSI<0.495 SB 0.2604FSI
kHz
0.225FSO/FSI<0.455 SB 0.1802FSI
kHz
0.167FSO/FSI<0.227 SB 0.0970FSI
kHz
Passband Ripple
0.225FSO/FSI6.000
PR
±0.01
dB
0.167FSO/FSI<0.227
PR
±0.50
dB
Stopband Attenuation 0.450FSO/FSI6.000
SA
95.2
dB
0.167FSO/FSI<0.455
SA
90.0
dB
Group Delay
(Tsi=1/fsi,Tso=1/fso)
GD
54Tsi + 9Tso
Tsi,Tso
(Note 12)
67H
Note 12. This delay is the a period from the rising edge of LRCLKI3, just after the data is input, to the rising
edge of LRCLKO, just before the data is output, when there is no phase difference between Input
and Output signals.
FSCONV Block
(Ta= -40°C to 85°C, VDD=3.0 to 3.6V, TVDD=1.7 to 3.6V, VSS =0V)
Parameter
Symbol min typ max Unit
Passband -0.01dB
0.167FSO/FSI0.363
PB
0
0.1814FSI kHz
Stopband
0.167FSO/FSI0.363 SB 0.8185FSI
kHz
Passband Ripple
0.167FSO/FSI0.363 PR
±0.005 dB
Stopband Attenuation 0.167FSO/FSI0.363 SA
94.0
dB
Group Delay
(Tsi=1/fsi,Tso=1/fso)
GD
8Tsi + 1Tso
Tsi,Tso
(Note 13)
68H
Note 6. Input signal frequency bandwidth of FSCONV must be attenuated more than 4kHz when the output
69H
sampling rate is 8kHz, or must be attenuated more than 8kHz when the output sampling rate is
16kHz.
Note 13. This delay is the a period from the rising edge of LRCLKI2, just after the data is input, to the rising
edge of LRCLKO, just before the data is output, when there is no phase difference between Input
and Output signals.
MS1562-E-00-PB
- 11 -
2013/10

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