|
|
PDF AK1110AEU Data sheet ( Hoja de datos )
| Número de pieza | AK1110AEU | |
| Descripción | Ultra Low Noise LDO Regulator | |
| Fabricantes | AKM | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de AK1110AEU (archivo pdf) en la parte inferior de esta página. Total 19 Páginas | ||
|
No Preview Available !
[AK1110AEU]
AK1110AEU
2ch Output, Ultra High PSRR, Ultra Low Noise LDO Regulator
1. General Description
The AK1110AEU is a dual output low dropout linear regulator with ON/OFF control. Each output can
supply 100mA and 200mA load current. The AK1110AEU is an integrated circuit achieving excellent ripple
rejection and low output noise characteristics with silicon monolithic bipolar structure. In addition, over
current and thermal protections are integrated. It is especially well suited for noise sensitive applications.
The AK1110AEU is housed in a small and thin type PLP10-2725 package with an exposed pad. It is
designed for space saving requiring systems.
2. Feature
Operating Voltage Range
6V to 14V
Maximum Output Current
LDO1 200mA
High Precision output voltage
LDO2 100mA
LDO1 5.0V
LDO2 5.0V
Dropout Voltage
LDO1 600mV at Io=200mA
LDO2 600mV at Io=100mA
Output Noise
LDO1 2µ VRMS at 10Hz to 100kHz
Ripple Rejection Ratio
LDO2 1µ VRMS at 10Hz to 100kHz
LDO1 83dB at f=1kHz
LDO2 100dB at f=1kHz
NP terminal to reduce output noise
On/Off Control Function
Over Current Protection, Thermal Protection
Ceramic Capacitor Available
Small Package
PLP10-2725 (2.7mm×2.5mm×0.6mm)
3. Application
High precision DAC applications, RF, PLL, etc.
016016348-E-00
-1-
2016/12
1 page  
[AK1110AEU]
7. Absolute Maximum Ratings
(GND_LDO1 = GND_LDO2 = GND_REG =0V)
Parameter
Symbol
Supply Voltage
(VIN_LDO1, VIN_LDO2)
VIN
Reverse Bias
(VOUT_LDO1, VOUT_LDO2)
VREV
Np Terminal Voltage
(NP_LDO1, NP_LDO2)
VNP
Min.
-0.3
-0.3
-0.3
Max.
16
6
16
Unit
V
V
V
Condition
EN Terminal Voltage (EN)
VEN -0.3
16
V
GND_LDO1- GND_LDO2
GND_LDO1- GND_REG
GND_LDO2- GND_REG
VGND -0.3
0.3
V
Junction Temperature
Tj - 150 °C
Storage Temperature Range
TSTG -55 150
°C
Power Dissipation
PD
-
1800
mW (Note 5)
Note 3. All voltages are with respect to GND. GND=0V
Note 4. The exposed pad should be connected to the GND plane.
Note 5. When the temperature is more than 25°C, derating by -18mW is needed. Thermal resistance
θJA= 55.4 °C /W (Mounted on the four-layer board that conforms to the JEDEC51)
WARNING: Operation at or beyond these limits may result in permanent damage to the device.
Normal operation is not guaranteed at these extremes.
2.5
RθJA=55.4℃/W at 4-layer PCB
2.0
1.5
1.0
0.5
0.0
0
25 50 75 100 125 150
Temperature (℃)
Figure 6. Thermal Derating Curve
016016348-E-00
-5-
2016/12
5 Page 
[AK1110AEU]
DC Characteristics
LDO1
Iout1=1mA
5.2
LDO2
5.2
Iout2=1mA
5.1 5.1
5.0 5.0
4.9 4.9
4.8
5
LDO1
5.2
7 9 11 13 15
4.8
5 7 9 11 13
Operating Voltage [V]
Operating Voltage [V]
Figure 101. Input voltage fluctuation
15
VIN=6V
LDO2
5.2
VIN=6V
5.1 5.1
5.0 5.0
4.9 4.9
4.8
0
50 100 150 200
4.8
0
Output Current [mA]
Figure 112. Load fluctuation
20 40 60 80
Output Current [mA]
100
LDO1
5.2
5.1
Iout1=1mA
Iout1=200mA
LDO2
5.2
5.1
Iout1=1mA
Iout1=100mA
5.0 5.0
4.9 4.9
4.8 4.8
4.7
4.5
5.0 5.5
Operating Voltage [V]
6.0
4.7
4.5
5.0 5.5
Operating Voltage [V]
6.0
Figure 123. Input vs Output Voltage
016016348-E-00
- 11 -
2016/12
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet AK1110AEU.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| AK1110AEU | Ultra Low Noise LDO Regulator | AKM |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |