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PDF MLX90255-BC Data sheet ( Hoja de datos )
| Número de pieza | MLX90255-BC | |
| Descripción | Linear Optical Array | |
| Fabricantes | Melexis | |
| Logotipo |  |
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MLX90255-BC
Linear Optical Array
Features and Benefits
D 128 x 1 Sensor-Element Organization (1 Not Connected, 1 dummy, 128 real,
D 1 dummy and 1 Dark Pixel)
D 385 Dots-Per-Inch (DPI) Sensor Pitch
D High Linearity and Uniformity for 256 Gray-Scale (8-Bit) Applications
D High Sensitivity:
D 2.0V @ 10µW/cm² @ 0.7ms integration time for open cavity devices
D 1.7V @ 10µW/cm² @ 0.7ms integration time for glass lid devices
D Special Gain Compensation for use with single LED light source
D Output Referenced to Ground
D Low Image Lag
D Single 5V Supply
D Replacement for TAOS, Inc. TSL1301 & TSL1401 and MLX90255BA
D Operation to 800kHz
Applications
D Linear Position Encoder
D Rotary Position Encoder
D Steering Torque and Angle Sensing (EPAS, ESP)
D Spectrometer Applications
D Bio-metrical Applications
D OCR and Barcode Applications
D
D
Ordering Code
Product Code Temperature Code Package Code
Option Code
MLX90255
K
WB BCM-000
MLX90255
K
XA BCR-000
MLX90255
K
XA BCR-000
Packing Form Code
TR
RE
TU
Legend:
Temperature Code:
Package Code:
Option Code:
Packing Form:
Ordering example:
K for Temperature Range -40°C to 125°C
WB for GLP5, XA for SOIC24
AAA-xxx: Die version
xxx-000: Standard version
RE for Reel
TR for Tray
MLX90255KWB-BCM-000-TR
390109025503
Rev. 002
Page 1 of 13
Aug/12
1 page  
MLX90255-BC
Linear Optical Array
MLX90255BC Electrical specifications
All tests are made with 0.7ms integration time at 25°C at 880nm and with a clock speed of 500kHz in,
250kHz out, and 500kHz, unless otherwise specified in the Test Conditions. 100% light under Test
Conditions means that the light is set in such a way that there is 2.4V at the output of the chip.
Parameter
Symbol Test Conditions
Min Typ Max Units
Sensitivity for devices with glas lid
Sensitvity for open devices
Polyimide Wafer
Illumination (1)
Sensitivity At 25°C
Illum100 At 25°C, 2.4V at output
0.135
0.14
0.14
0.151
0.16
0.176
14
0.179
0.19
0.21
31.
V/µW/
cm2
µW/cm²
Average analog output (1)
VaoLight At 25°C, 100% light
2.4 V
Average analog output
Initial offset At 25°C, 0% light
0 0.15 0.3
V
Average analog output
VaoDark At 125°C, 0% light
0 0.40 1.4
V
Highest Dark Pixel
Vaodarkmax At 125°C, 0.25ms integration time
0.8 V
Non Linearity
Nlao1 All Temp
±0.5% ±1.2%
FS
Pixel Response Non Uniformity (2) PRNU All Temp, 100% light
±4.0% ±8.5%
FS
Pixel Interaction Test (3)
PIT AT 25°C
5% 32.
FS
Noise Level (4)
Vn All Temp
3 6 mV (RMS)
Hold spec, same as PRNU
PRNUH All Temp, 100% light, 62.5kHz
±4.0% ±8.5%
FS
Output Settling Time
Ts All Temp
450 750
ns
Array Lag (5)
Alag At 25°C
0.5% 33.
FS
Dark Signal Non Uniformity (6)
Analog Output Saturation
DSNU At 25°C
At 125°C
All Temp
80 120
140 440
3.0
mV
mV
V
Change in sensitivity with
Temperature at 880nm (7)
Operating Free Temp
0.3 34.
-40 35.
125
%/°C
°C
Supply Current (8)
Idd 36.
258
mA
(1) After power on, the first integration scan is not guaranteed correct. This scan is needed for initializing digital levels on chip. After a SI and 133 proper
CLK signals, the system is fully initialized and all further scans are valid. The next SI will provide a valid scan.
(2) Absolute Light measurements are very test-setup dependent and should be regarded with caution. Relative measurements are possible with ±1%
accuracy.
(3) PRNU is defined as the worst case deviation of any PixelValue (pixel 3 till 130) to the average light value. PixelValue = (Vout of a pixel at 100% light
– Vout of same pixel at 0% light) The MLX90255BC has a cosine shaped gain: external pixels have 15% more gain than middle pixels.
(4) PIT = (Vout of pixel 132 @ 10µW – Vout of pixel 132 @0µW) / (Vaverage @10µW – Vaverage @10µW)
(5) Noise: We compare 5 different measurements, normalize them and then take the RMS value.
(6) Array Lag is defined as: (Vaverage 0µW1 Vaverage 0µW2) / ((Vaverage 10µW Vaverage 0µW2). Where 0µW1 is a 0% light level, 1ms after a 100%
light level. (there can still be some light effects). 0µW2 is a 0% light level, 10ms after a 100% light level, which should be a true dark reference.
(7) DSNU is defined as: (max Vout of pixel I @ 0% light) - (min Vout of pixel j @ 0% light) for pixels 3 thru 130
(8) Sensitivity always increases with rising temperature.
(9) Idd is measured with Rload disconnected from the output pin.
390109025503
Rev. 002
Page 5 of 13
Aug/12
5 Page 
MLX90255-BC
Linear Optical Array
b. XA (SOIC-24 without glass) Pin Description
Pin
5
6
7
8
3,4,9,10,
15,16,21,22
Sym Description
bol
SI Serial Input. Si defines the start
of the data-out sequence
CLK Clock. CLK controls the charge
transfer, pixel output and reset
(together with SI)
A0 Analog Output
Vdd Supply voltage, for both analog
and digital circuits
Vss Ground (substrate). All Vss Pins
are referenced to the substrate.
c. MLX90255KWB-BCM (GLP-5 with glass) package dimensions
1 23 4 5
390109025503
Rev. 002
Page 11 of 13
Aug/12
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet MLX90255-BC.PDF ] | |
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