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PDF FDPF13N50FT Data sheet ( Hoja de datos )

Número de pieza FDPF13N50FT
Descripción MOSFET ( Transistor )
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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FDPF13N50FT
N-Channel UniFETTM FRFET® MOSFET
500 V, 12 A, 540 mΩ
November 2013
Features
• RDS(on) = 420 mΩ (Typ.) @ VGS = 10 V, ID = 6 A
• Low Gate Charge (Typ. 30 nC)
• Low Crss (Typ. 14.5 pF)
• 100% Avalanche Tested
• Improved dv/dt Capability
• RoHS Compliant
Applications
• LCD/LED/PDP TV
• Lighting
• Uninterruptible Power Supply
Description
UniFETTM MOSFET is Fairchild Semiconductor’s high voltage
MOSFET family based on planar stripe and DMOS technology.
This MOSFET is tailored to reduce on-state resistance, and to
provide better switching performance and higher avalanche
energy strength. The body diode’s reverse recovery
performance of UniFET FRFET® MOSFET has been enhanced
by lifetime control. Its trr is less than 100nsec and the reverse dv/
dt immunity is 15V/ns while normal planar MOSFETs have over
200nsec and 4.5V/nsec respectively. Therefore, it can remove
additional component and improve system reliability in certain
applications in which the performance of MOSFET’s body diode
is significant. This device family is suitable for switching power
converter applications such as power factor correction (PFC),
flat panel display (FPD) TV power, ATX and electronic lamp
ballasts.
D
GDS
TO-220F
G
S
MOSFET Maximum Ratings TC = 25oC unless otherwise noted.
Symbol
Parameter
VDSS
VGSS
ID
IDM
EAS
IAR
EAR
dv/dt
PD
Drain to Source Voltage
Gate to Source Voltage
Drain Current
Drain Current
- Continuous (TC = 25oC)
- Continuous (TC = 100oC)
- Pulsed
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation
(TC = 25oC)
- Derate Above 25oC
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
TJ, TSTG
Operating and Storage Temperature Range
TL Maximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds
*Drain current limited by maximum junction temperature.
Thermal Characteristics
Symbol
RθJC
RθJA
Parameter
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient, Max.
FDPF13N50FT
500
±30
12*
7.2*
48*
684
12
19.5
20
42
0.33
-55 to +150
300
FDPF13N50FT
3.0
62.5
Unit
V
V
A
A
mJ
A
mJ
V/ns
W
W/oC
oC
oC
Unit
oC/W
©2012 Fairchild Semiconductor Corporation
FDPF13N50FT Rev. C2
1
www.fairchildsemi.com

1 page




FDPF13N50FT pdf
IG = const.
Figure 11. Gate Charge Test Circuit & Waveform
V10GVS
VDS
VGS
RG
RL
VDD
VDS
90%
DUT
VGS 10%
td(on)
tr
t on
Figure 12. Resistive Switching Test Circuit & Waveforms
td(off)
tf
t off
VGS
Figure 13. Unclamped Inductive Switching Test Circuit & Waveforms
©2012 Fairchild Semiconductor Corporation
FDPF13N50FT Rev. C2
5
www.fairchildsemi.com

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