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PDF PLL52C59-14A Data sheet ( Hoja de datos )
| Número de pieza | PLL52C59-14A | |
| Descripción | System Clock Generator | |
| Fabricantes | PhaseLink | |
| Logotipo |  |
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PLL52C59-14A
System Clock Generator with Integrated Buffers
FEATURES
n Generates all clock frequencies for Pentium, CYRIX
and AMD CPU.
n Provides 4 copies of CPU clock, 6 copies of PCI clock,
two system clocks, one 24Mhz and one 48Mhz clock.
n Support 32Mhz Asynchronous PCI BUS clock.
n On chip loop filter components for dual PLLs.
n 3.3V and 5V operation; 50 percent duty cycle.
n Meets Intel Triton system clocking requirements
n Available in 28 pin 300 mil SOIC.
PIN INFORMATION
DESCRIPTION
The PLL52C59-14A is a high performance system clock
generator designed to support Pentium/PCI based systems.
Both synchronous and asynchronous mode for PCI BUS
clock are provided. All output clocks skew and jitter
performance are designed to be fully compliant with INTEL
Pentium CPU timing requirements.
TIMING SPECIFICATIONS
PCLK-PCLK skew
BCLK-BCLK skew
PCLK-BCLK skew
PCLK,BCLK slew rate
PCLK Jitter
<250 ps
<500 ps
1~5 ns (PCLK leads)
> 1 V/ns (0.4 ~2.4V)
±200 ps cycle-cycle
BLOCK DIAGRAM
FREQUENCY SELECTION (MHz)
FSEL2 FSEL1 FSEL0 PCLK(0:3)
100
50
101
66.6
110
60
111
55
000
83.3
001
83.3
010
75
011
75
BCLK(0:5)
25
33.3
30
27.5
41.6
32 (Asyn)
32 (Asyn)
37.5
90 BONAVENTURA DR. SAN JOSE, CALIFORNIA TEL 408-944-0880 FAX 408-944-0110
9608.Rev.1A Page 1
1 page | ||
| Páginas | Total 1 Páginas | |
| PDF Descargar | [ Datasheet PLL52C59-14A.PDF ] | |
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