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PDF PLL52C59-14T Data sheet ( Hoja de datos )
| Número de pieza | PLL52C59-14T | |
| Descripción | System Clock Generator | |
| Fabricantes | PhaseLink | |
| Logotipo |  |
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PLL52C59-14T
System Clock Generator with Integrated Buffers
FEATURES
n Generates all clock frequencies for Pentium and
CYRIX CPU.
n Provides 4 copies of CPU clock, 6 copies of PCI clock,
two system clocks, one 24Mhz and one 48Mhz clock.
n One turbo input pin accelerates 3 CPU frequencies
(50,60 and 66Mhz) by 2.5%.
n On chip loop filter components for dual PLLs.
n 3.3V and 5V operation; or 2.5V on CPUVDD
n 50 percent duty cycle.
n Meets Intel Triton system clocking requirements
n Available in 28 pin 300 mil SOIC.
DESCRIPTION
The PLL52C59-14T is a high performance system clock
generator designed to support Pentium/PCI based systems.
Its TURBO option offers a feature that can speed up the CPU
CLOCK by 2.5%. All output clocks skew and jitter
performance are designed to be fully compliant with INTEL
Pentium CPU timing requirements.
TIMING SPECIFICATIONS
PCLK-PCLK skew
BCLK-BCLK skew
PCLK-BCLK skew
PCLK,BCLK slew rate
PCLK Jitter
<250 ps
<500 ps
1~5 ns (PCLK leads)
> 1 V/ns (0.4 ~2.4V)
±200 ps cycle-cycle
PIN INFORMATION
FREQUENCY SELECTION (MHz)
TURBO FSEL1 FSEL0
100
101
110
111
000
001
010
011
PCLK(0:3)
50
66.6
60
55
51.3
68.4
61.6
75
BCLK(0:5)
25
33.3
30
27.5
25.6
34.2
30.8
37.5
BLOCK DIAGRAM
45437 Warm Springs Blvd., Fremont, CA 94539, TEL 510-492-0990 FAX 510-492-0991
9701.Rev.1C Page 1
1 page | ||
| Páginas | Total 1 Páginas | |
| PDF Descargar | [ Datasheet PLL52C59-14T.PDF ] | |
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