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PDF Si5999EDU Data sheet ( Hoja de datos )

Número de pieza Si5999EDU
Descripción Dual P-Channel 20 V (D-S) MOSFET
Fabricantes Vishay 
Logotipo Vishay Logotipo



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Dual P-Channel 20 V (D-S) MOSFET
Si5999EDU
Vishay Siliconix
PRODUCT SUMMARY
VDS (V)
RDS(on) ()
0.059 at VGS = - 4.5 V
- 20
0.096 at VGS = - 2.5 V
ID (A)
- 6a
- 6a
Qg (Typ.)
6.9 nC
PowerPAK ChipFET Dual
1
FEATURES
Halogen-free According to IEC 61249-2-21
Definition
• TrenchFET® Power MOSFET
• New Thermally Enhanced PowerPAK®
ChipFET® Package
- Small Footprint Area
- Low On-Resistance
- Thin 0.8 mm Profile
• Typical ESD Performance 1500 V in HBM
• Compliant to RoHS Directive 2002/95/EC
S1 2
APPLICATIONS
D1 G1
8 D1
7
D2
6 D2
5
3
S2 4
G2
Load Switch and Charger Switch
for Portable Devices
S1
• DC/DC Converters
Marking Code
OA XXX
Lot Traceability
and Date Code
G1
G2
S2
Bottom View
Part #
Code
D1 D2
Ordering Information: Si5999EDU-T1-GE3 (Lead (Pb)-free and Halogen-free)
P-Channel MOSFET P-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
TC = 25 °C
Continuous Drain Current (TJ = 150 °C)
TC = 70 °C
TA = 25 °C
ID
TA = 70 °C
Pulsed Drain Current (t = 300 µs)
Continuous Source-Drain Diode Current
TC = 25 °C
TA = 25 °C
IDM
IS
Maximum Power Dissipation
TC = 25 °C
TC = 70 °C
TA = 25 °C
PD
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)d, e
TA = 70 °C
TJ, Tstg
Limit
- 20
± 12
- 6a
- 6a
- 5b, c
- 4b, c
- 20
- 6a
- 1.9b, c
10.4
6.7
2.3b, c
1.5b, c
- 55 to 150
260
Unit
V
A
W
°C
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Typical
Maximum
Unit
Maximum Junction-to-Ambientb, f
Maximum Junction-to-Case (Drain)
t5s
Steady State
RthJA
RthJC
43
9.5
55
°C/W
12
Notes:
a. Package limited.
b. Surface mounted on 1" x 1" FR4 board.
c. t = 5 s.
d. See solder profile (www.vishay.com/ppg?73257). The PowerPAK ChipFET is a leadless package. The end of the lead terminal is exposed
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and
is not required to ensure adequate bottom side solder interconnection.
e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components.
f. Maximum under steady state conditions is 105 °C/W.
Document Number: 67019
S10-2428-Rev. A, 25-Oct-10
www.vishay.com
1

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Si5999EDU pdf
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
100
Limited by RDS(on)*
10
100 μs
1
0.1
TA = 25 °C
Single Pulse
1 ms
BVDSS Limited
10 ms
100 ms
1 s, 10 s
DC
0.01
0.1 1 10 100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Safe Operating Area, Junction-to-Ambient
12 15
Si5999EDU
Vishay Siliconix
9
Package Limited
6
3
12
9
6
3
0
0
1.5
25 50 75 100 125
TC - Case Temperature (°C)
Current Derating*
150
0
0 25 50 75 100 125 150
TC - Case Temperature (°C)
Power Derating, Junction-to-Case
1.2
0.9
0.6
0.3
0.0
0
25 50 75 100 125 150
TA - Ambient Temperature (°C)
Power Derating, Junction-to-Ambient
Document Number: 67019
S10-2428-Rev. A, 25-Oct-10
* The power dissipation PD is based on TJ(max) = 150 °C, using
junction-to-case thermal resistance, and is more useful in settling the
upper dissipation limit for cases where additional heatsinking is used.
It is used to determine the current rating, when this rating falls below
the package limit.
www.vishay.com
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