DataSheet39.com

What is 9FGV0231?

This electronic component, produced by the manufacturer "IDT", performs the same function as "2-OUTPUT VERY LOW POWER PCIE GEN1-2-3 CLOCK GENERATOR".


9FGV0231 Datasheet PDF - IDT

Part Number 9FGV0231
Description 2-OUTPUT VERY LOW POWER PCIE GEN1-2-3 CLOCK GENERATOR
Manufacturers IDT 
Logo IDT Logo 


There is a preview and 9FGV0231 download ( pdf file ) link at the bottom of this page.





Total 15 Pages



Preview 1 page

No Preview Available ! 9FGV0231 datasheet, circuit

2-OUTPUT VERY LOW POWER PCIE GEN1-2-3 CLOCK GENERATOR
DATASHEET
9FGV0231
Description
The 9FGV0231 is a 2-output very low power clock
generator for PCIe Gen 1, 2 and 3 applications. The device
has 2 output enables for clock management and supports 2
different spread spectrum levels in addition to spread off.
Recommended Application
PCIe Gen1-2-3 clock generator
Output Features
2 - 0.7V low-power HCSL-compatible (LP-HCSL) DIF
pairs
1 - 1.8V LVCMOS REF output w/Wake-On-LAN (WOL)
support
Key Specifications
DIF cycle-to-cycle jitter <50ps
DIF output-to-output skew <50ps
DIF phase jitter is PCIe Gen1-2-3 compliant
REF phase jitter is <1.5ps RMS
Features/Benefits
1.8V operation; reduced power consumption
OE# pins; support DIF power management
LP-HCSL differential clock outputs; reduced power and
board space
Programmable Slew rate for each output; allows tuning
for various line lengths
Programmable output amplitude; allows tuning for
various application environments
DIF outputs blocked until PLL is locked; clean system
start-up
Selectable 0%, -0.25% or -0.5% spread on DIF outputs;
reduces EMI
External 25MHz crystal; supports tight ppm with 0 ppm
synthesis error
Configuration can be accomplished with strapping pins;
SMBus interface not required for device control
3.3V tolerant SMBus interface works with legacy
controllers
Space saving 24-pin 4x4 mm VFQFPN; minimal board
space
Block Diagram
X1_25
X2
OE(1:0)#
OSC
SS Capable PLL
SADR
SS_EN_tri
CKPWRGD_PD#
SDATA_3.3
SCLK_3.3
CONTROL
LOGIC
REF1.8
2
DIF(1:0)
IDT® 2-OUTPUT VERY LOW POWER PCIE GEN1-2-3 CLOCK GENERATOR
1
9FGV0231 OCTOBER 18, 2016

line_dark_gray
9FGV0231 equivalent
9FGV0231
2-OUTPUT VERY LOW POWER PCIE GEN1-2-3 CLOCK GENERATOR
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the 9FGV0231. These ratings, which are standard
values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other
conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over
the recommended operating temperature range.
PARAMETER
SYMBOL
CONDITIONS
1.8V Supply Voltage
VDDxx
Applies to All VDD pins
Input Voltage
VIN
Input High Voltage, SMBus VIHSMB
Storage Temperature
Ts
SMBus clock and data pins
Junction Temperature
Tj
Input ESD protection ESD prot
Human Body Model
1Guaranteed by design and characterization, not 100% tested in production.
2 Operation under these conditions is neither implied nor guaranteed.
3 Not to exceed 2.5V.
MIN
-0.5
-0.5
-65
2000
TYP
MAX
2.5
VDD+0.3V
3.6V
150
125
UNITS
V
V
V
°C
°C
V
NOTES
1,2
1, 3
1
1
1
1
Electrical Characteristics–Current Consumption
TA = TCOM or TIND; Supply Voltage per VDD of normal operation conditions, See Test Loads for Loading Conditions
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
Operating Supply Current
IDDAOP
IDDOP
VDDA, PLL Mode, All outputs active @100MHz
VDD, All outputs active @100MHz
Suspend Supply Current IDDSUSP
VDDxxx, PD# = 0, Wake-On-LAN enabled
Powerdown Current
IDDPD
PD#=0
1Guaranteed by design and characterization, not 100% tested in production.
2Assuming REF is not running in power down state
78
15 18
68
0.6 1
UNITS
mA
mA
mA
mA
NOTES
1
1
1
1, 2
Electrical Characteristics–Differential Output Duty Cycle, Jitter, and Skew
Characteristics
TA = TCOM or TIND; Supply Voltage per VDD of normal operation conditions, See Test Loads for Loading Conditions
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
Duty Cycle
tDC Measured differentially, PLL Mode
Skew, Output to Output
tsk3
VT = 50%
Jitter, Cycle to cycle
tjcyc-cyc
PLL mode
1Guaranteed by design and characterization, not 100% tested in production.
2 Measured from differential waveform
45 49.9 55
37 50
12 50
UNITS
%
ps
ps
NOTES
1
1
1,2
IDT® 2-OUTPUT VERY LOW POWER PCIE GEN1-2-3 CLOCK GENERATOR
5
9FGV0231 OCTOBER 18, 2016


line_dark_gray

Preview 5 Page


Part Details

On this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for 9FGV0231 electronic component.


Information Total 15 Pages
Link URL [ Copy URL to Clipboard ]
Download [ 9FGV0231.PDF Datasheet ]

Share Link :

Electronic Components Distributor


An electronic components distributor is a company that sources, stocks, and sells electronic components to manufacturers, engineers, and hobbyists.


SparkFun Electronics Allied Electronics DigiKey Electronics Arrow Electronics
Mouser Electronics Adafruit Newark Chip One Stop


Featured Datasheets

Part NumberDescriptionMFRS
9FGV0231The function is 2-OUTPUT VERY LOW POWER PCIE GEN1-2-3 CLOCK GENERATOR. IDTIDT

Semiconductors commonly used in industry:

1N4148   |   BAW56   |   1N5400   |   NE555   |  

LM324   |   BC327   |   IRF840  |   2N3904   |  



Quick jump to:

9FGV     1N4     2N2     2SA     2SC     74H     BC     HCF     IRF     KA    

LA     LM     MC     NE     ST     STK     TDA     TL     UA    



Privacy Policy   |    Contact Us     |    New    |    Search