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PDF A6862 Data sheet ( Hoja de datos )
| Número de pieza | A6862 | |
| Descripción | Automotive 3-Phase Isolator MOSFET Driver | |
| Fabricantes | Allegro | |
| Logotipo |  |
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A6862
Automotive 3-Phase Isolator MOSFET Driver
FEATURES AND BENEFITS
• Three floating n-channel MOSFET drives
• Maintains VGS with 100 kΩ gate-source resistors
• Integrated charge pump controller
• 4.5 to 50 V supply voltage operating range
• Two independent activation inputs
• Single phase-enable input
• VCP and VGS undervoltage protection
• 150°C ambient (165°C junction) continuous
APPLICATIONS
• 3-phase disconnect for ASIL systems up to level D
• Electric power steering (EPS)
• Electric braking
• 3-phase solid-state relay driver
PACKAGE:
16-lead TSSOP with exposed thermal pad (suffix LP)
Not to scale
DESCRIPTION
The A6862 is an n-channel power MOSFET driver capable
of controlling MOSFETs connected as a 3-phase solid-state
relay in phase-isolation applications. It has three independent
floating gate drive outputs to maintain the power MOSFETs in
the on-state over the full supply range with high phase-voltage
slew rates. An integrated charge pump regulator provides the
above battery supply voltage necessary to maintain the power
MOSFETs in the on-state continuously when the phase voltage
is equal to the battery voltage. The charge pump will maintain
sufficient gate drive (>7.5 V) for battery voltages down to 4.5 V
with 100 kΩ gate source resistors.
The three gate drives can be controlled by a single logic-level
input. In typical applications, the MOSFETs will be switched
on within 8 µs and will switch off within 1 µs.
Two independent activation inputs can be used to put theA6862
into a low-power sleep mode with the charge pump disabled.
Undervoltage monitors check that the pumped supply voltage
and the gate drive outputs are high enough to ensure that the
MOSFETs are maintained in a safe conducting state.
The A6862 is supplied in a 16-lead TSSOP (LP) with exposed
pad for enhanced thermal dissipation. They are lead (Pb) free,
with 100% matte-tin leadframe plating.
A4405
Regulator
Micro-
Controller
A4910
A4935
A4937
A4939
VBAT
A6862
3-Phase
BLDC
Motor
A6862-DS
Figure 1: Typical Application Diagram
1 page  
A6862
Automotive 3-Phase Isolator MOSFET Driver
ELECTRICAL CHARACTERISTICS: Valid at TJ = –40 to 150°C, VBB = 4.5 to 50 V, unless noted otherwise
Characteristics
Symbol
Test Conditions
Min.
Typ.
SUPPLY
Operating; outputs active
4.5 –
VBB Functional Operating Range [1]
VBB Operating; outputs disabled
No undefined states
4–
0–
VBB Supply Current
VCP Output Voltage w.r.t. VBB
VCP Static Load Resistor
GATE DRIVE
IBB
IBBQ
IBBS
VCP
RCP
Gate drive active, VBB = 12 V
Gate drive inactive, VBB = 12 V
IG or POK < 0.8 V, VBB = 12 V
VBB > 9 V, IVCP > –1 mA [2]
6 V < VBB ≤ 9 V, IVCP > –1 mA [2]
4.5 V < VBB ≤ 6 V, IVCP > –800 µA [2]
Between VCP and VBB (using ±1% tolerance resistor)
–
–
–
9
8
7.5
100
11
6
–
10
10
9.5
–
Turn-On Time
Turn-Off Time
Propagation Delay – Turn On [3]
Propagation Delay – Turn Off [3]
Turn-On Pulse Current
Turn-On Pulse Time
On Hold Current
Pull-Down On Resistance
Gx Output High Voltage w.r.t. SX,
when SX ≤ VBB
Gate Drive Static Load Resistor
Gx Output Voltage Low
Gx Passive Pull-Down
tr
tr
tPON
tPOFF
IGXP
tGXP
IGXH
RDS(on)DN
VGH
RGS
VGL
RGPD
CLOAD = 10 nF, 20% to 80%
CLOAD = 10 nF, 80% to 20%
CLOAD = 10 nF, ENx high to Gx 20%
CLOAD = 10 nF, ENx low to Gx 80%
TJ = 25°C, IGx= 10 mA
TJ = 150°C, IGx = 10 mA
VBB > 9 V
6 V < VBB ≤ 9 V
4.5 V < VBB ≤ 6 V
Between Gx and Sx (using ±1% tolerance resistor)
–10 µA < IGx < 10 µA
VGx – VSx < 0.3 V
–5
– 0.5
––
––
8.5 10
16 –
– 400
–5
– 10
9 10
8 10
7.5 9.5
100 –
––
– 950
Continued on next page...
Max. Units
50 V
50 V
50 V
15 mA
9 mA
10 µA
11 V
11 V
–V
– kΩ
–
–
3
2.25
12
36
–
–
–
12
12
–
–
VSX + 0.3
–
µs
µs
µs
µs
mA
µs
μA
Ω
Ω
V
V
V
kΩ
V
kΩ
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
5 Page 
A6862
Automotive 3-Phase Isolator MOSFET Driver
ENA Terminal
Input
Output
High
1.1 V
High
Fault
0.9 V
0.7 V
On
0.4 V
Low
Off
Figure 7: ENA Terminal Input and Output Levels
MCU
ENH
DIS
VDIGITAL
R = (VDIGITAL – 1) / (10-500 µA) in Ω
A6862
ENA
ACTIVE
UV = VCPU + VGSUx
VOLF (+1 V @ 10-500 µA)
Figure 8: ENA Connection
VBB
VCP
UV*
ACTIVE*
VCPON
ENA*
DIS*
ENH*
Power on
Active when
VCP > VCPON,
after tCPON
VOLF
Disabled
by MCU
Enabled
by MCU
VCPUV
after
tCPUV
Recover when Power
VCP > VCPON,
off
after tCPON
Disabled by MCU
and Power on
Enabled
by MCU
Figure 9: ENA Signal Sequence
* For signals, see Figure 8
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
11
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet A6862.PDF ] | |
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