PDF MC10H164 Data sheet ( Hoja de datos )

Número de pieza	MC10H164
Descripción	8-Line Multiplexer
Fabricantes	Motorola Semiconductors
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No Preview Available ! MOTOROLA SEMICONDUCTOR TECHNICAL DATA 8-Line Multiplexer MC10H164 The MC10H164 is a MECL 10H part which is a functional/pinout duplication of the standard MECL 10K family part, with 100% improvement in propagation delay, and no increase in power supply current. The MC10H164 is designed to be used in data multiplexing and parallel to serial conversion applications. Full parallel gating provides equal delays through any data path. The MC10H164 incorporates an output buffer, eight inputs and an enable. A high on the enable forces the output low. The open emitter output allows the MC10H164 to be connected directly to a data bus. The enable line allows an easy means of expanding to more than 8 lines using additional MC10H164’s. • Propagation Delay, 1.0 ns Typical • Power Dissipation, 310 mW Typical (same as MECL 10K) • Improved Noise Margin 150 mV (Over Operating Voltage and Temperature Range) • Voltage Compensated • MECL 10K–Compatible MAXIMUM RATINGS Characteristic Power Supply (VCC = 0) Input Voltage (VCC = 0) Output Current — Continuous — Surge Symbol VEE VI Iout Rating –8.0 to 0 0 to VEE 50 100 Unit Vdc Vdc mA Operating Temperature Range Storage Temperature Range — Plastic — Ceramic TA 0 to +75 °C Tstg –55 to +150 °C –55 to +165 °C ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note) 0° 25° 75° Characteristic Symbol Min Max Min Max Min Max Unit Power Supply Current Input Current High Input Current Low High Output Voltage Low Output Voltage High Input Voltage Low Input Voltage IE IinH IinL VOH VOL VIH VIL — 83 — 75 — 83 — 512 — 320 — 320 0.7 — 0.7 — 0.7 — –1.02 –0.84 –0.98 –0.81 –0.92 –0.735 –1.95 –1.63 –1.95 –1.63 –1.95 –1.60 –1.17 –0.84 –1.13 –0.81 –1.07 –0.735 –1.95 –1.48 –1.95 –1.48 –1.95 –1.45 mA µA µA Vdc Vdc Vdc Vdc AC PARAMETERS Propagation Delay Enable Data Address tpd ns 0.4 1.45 0.4 1.5 0.5 1.7 0.7 2.4 0.8 2.5 0.9 2.6 1.0 2.8 1.1 2.9 1.2 3.2 Rise Time Fall Time tr 0.5 1.5 0.5 1.6 0.5 1.7 ns tf 0.5 1.5 0.5 1.6 0.5 1.7 ns NOTE: Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through a 50–ohm resistor to –2.0 volts. L SUFFIX CERAMIC PACKAGE CASE 620–10 P SUFFIX PLASTIC PACKAGE CASE 648–08 FN SUFFIX PLCC CASE 775–02 A7 B9 C 10 Enable 2 X0 6 X1 5 X2 4 X3 3 X4 11 X5 12 X6 13 X7 14 ENABLE L L L L L L L L H LOGIC DIAGRAM VCC1 = VCC2 = VEE = PIN 1 PIN 16 PIN 8 Z 15 TRUTH TABLE ADDRESS INPUTS C BA L LL L LH L HL L HH H LL H LH H HL H HH X XX Z X0 X1 X2 X3 X4 X5 X6 X7 L DIP PIN ASSIGNMENT VCC1 1 16 VCC2 ENABLE 2 15 Z X3 3 14 X7 X2 4 13 X6 X1 5 12 X5 X0 6 11 X4 A 7 10 C VEE 8 9B Pin assignment is for Dual–in–Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 6–11 of the Motorola MECL Data Book (DL122/D). 9/96 © Motorola, Inc. 1996 2–257 REV 6 1 page

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