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PDF MC10H123 Data sheet ( Hoja de datos )

Número de pieza MC10H123
Descripción Triple 4-3-3-Input Bus Driver
Fabricantes Motorola Semiconductors 
Logotipo Motorola Semiconductors Logotipo



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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Triple 4-3-3-Input Bus Driver
The MC10H123 is a triple 4–3–3–Input Bus Driver.
The MC10H123 consists of three NOR gates designed for bus driving
applications on card or between cards. Output low logic levels are specified with
VOL = –2.1 Vdc so that the bus may be terminated to –2.0 Vdc. The gate output,
when low, appears as a high impedance to the bus, because the output
emitter–followers of the MC10H123 are “turned–off.” This eliminates
discontinuities in the characteristic impedance of the bus.
The VOH level is specified when driving a 25–ohm load terminated to –2.0
Vdc, the equivalent of a 50–ohm bus terminated at both ends. Although 25
ohms is the lowest characteristic impedance that can be driven by the
MC10H123, higher impedance values may be used with this part. A typical
50–ohm bus is shown in Figure 1.
Propagation Delay, 1.5 ns Typical
Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
Voltage Compensated
MECL 10K–Compatible
MAXIMUM RATINGS
Characteristic
Symbol
Rating
Unit
Power Supply (VCC = 0)
Input Voltage (VCC = 0)
Output Current — Continuous
— Surge
VEE
VI
Iout
–8.0 to 0
0 to VEE
50
100
Vdc
Vdc
mA
Operating Temperature Range
Storage Temperature Range — Plastic
— Ceramic
TA
0 to +75
°C
Tstg
–55 to +150
°C
–55 to +165
°C
ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note)
0° 25° 75°
Characteristic
Symbol Min Max Min Max Min Max Unit
Power Supply Current
Input Current High
Input Current Low
High Output Voltage
Low Output Voltage
High Input Voltage
Low Input Voltage
AC PARAMETERS
IE
IinH
IinL
VOH
VOL
VIH
VIL
— 60 — 56 —
60
— 495 — 310 — 310
0.5 — 0.5 — 0.3
–1.02 –0.84 –0.98 –0.81 –0.92 –0.735
–2.1 –2.03 –2.1 –2.03 –2.1 –2.03
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735
–1.95 –1.48 –1.95 –1.48 –1.95 –1.45
mA
µA
µA
Vdc
Vdc
Vdc
Vdc
Propagation Delay
tpd 0.7 1.5 0.7 1.6 0.7 1.7 ns
Rise Time
tr 0.7 1.6 0.7 1.7 0.7 1.8 ns
Fall Time
tf 0.7 1.6 0.7 1.7 0.7 1.8 ns
NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit
board and transverse air flow greater than 500 Ifpm is maintained. Outputs are terminated through a
50–ohm resistor to –2.1 volts.
MC10H123
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
LOGIC DIAGRAM
4
5
3
6
7
9
10 2
11 VCC1 = PIN 1
VCC2 = PIN 16
12 VEE = PIN 8
13 15
14
DIP
PIN ASSIGNMENT
VCC1
BOUT
AOUT
AIN
AIN
AIN
AIN
VEE
1
2
3
4
5
6
7
8
16 VCC2
15 COUT
14 CIN
13 CIN
12 CIN
11 BIN
10 BIN
9 BIN
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
3/93
© Motorola, Inc. 1996
2–41
REV 5

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