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PDF MC10H116 Data sheet ( Hoja de datos )

Número de pieza MC10H116
Descripción Triple Line Receiver
Fabricantes Motorola Semiconductors 
Logotipo Motorola Semiconductors Logotipo



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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Triple Line Receiver
MC10H116
The MC10H116 is a functional/pinout duplication of the MC10116, with 100%
improvement in propagation delay and no increase in power– supply current.
Propagation Delay, 1.0 ns Typical
Power Dissipation 85 mW Typ/Pkg (same as MECL 10K)
Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
Voltage Compensated
MECL 10K–Compatible
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
MAXIMUM RATINGS
Characteristic
Symbol
Rating
Unit
Power Supply (VCC = 0)
Input Voltage (VCC = 0)
Output Current — Continuous
— Surge
VEE
VI
Iout
–8.0 to 0
0 to VEE
50
100
Vdc
Vdc
mA
Operating Temperature Range
Storage Temperature Range — Plastic
— Ceramic
TA
0 to +75
°C
Tstg
–55 to +150
°C
–55 to +165
°C
ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (2)
0° 25° 75°
Characteristic
Symbol Min Max Min Max Min
Max
Unit
Power Supply Current
Input Current High
Input Leakage Current
Reference Voltage
High Output Voltage
Low Output Voltage
High Input Voltage (1)
Low Input Voltage (1)
Common Mode
Range (3)
IE
IinH
ICBO
VBB
VOH
VOL
VIH
VIL
VCMR
–1.38
–1.02
–1.95
–1.17
–1.95
23
150
1.5
–1.27
–0.84
–1.63
–0.84
–1.48
— 21
— 95
— 1.0
–1.35 –1.25
–0.98 –0.81
–1.95 –1.63
–1.13 –0.81
–1.95 –1.48
–2.85 to –0.8
–1.31
–0.92
–1.95
–1.07
–1.95
23
95
1.0
–1.19
–0.735
–1.60
–0.735
–1.45
mA
µA
µA
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
Input Sensitivity (4)
AC PARAMETERS
VPP
——
150 typ
— — mVPP
Propagation Delay
tpd
0.4 1.3 0.4 1.3 0.45 1.45
ns
Rise Time
tr
0.5 1.5 0.5 1.6 0.5
1.7
ns
Fall Time
tf
0.5 1.5 0.5 1.6 0.5
1.7
ns
NOTES:
1. When VBB is used as the reference voltage.
2. Each MECL 10H series circuit has been designed to meet the specifications shown in the test table, after thermal
equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse
air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50–ohm resistor to –2.0 volts.
3. Differential input not to exceed 1.0 Vdc.
4. 150 mVp–p differential input required to obtain full logic swing on output.
D SUFFIX
PLASTIC SOIC
CASE 751B–05
FN SUFFIX
PLCC
CASE 775–02
LOGIC DIAGRAM
42
53
96
10 7
12 14
13 15
VBB*
11
VCC1 = Pin 1
VCC2 = Pin 16
VEE = Pin 8
When input pin with
bubble goes positive
it’s respective output
pin with bubble goes
positive.
*VBB to be used to supply bias to the MC10H116 only
and bypassed (when used) with 0.01 µF to 0.1 µF
capacitor to ground (0 V). VBB can source < 1.0 mA.
The MC10H116 is designed to be used in sensing
differential signals over long lines. The bias supply
(VBB) is made available to make the device useful as a
Schmitt trigger, or in other applications where a stable
reference voltage is necessary.
Active current sources provide these receivers with
excellent common–mode noise rejection. If any amplifi-
er in a package is not used, one input of that amplifier
must be connected to VBB to prevent unbalancing the
current–source bias network.
The MC10H116 does not have internal–input pull-
down resistors. This provides high impedance to the
amplifier input and facilitates differential connections.
Applications:
Low Level Receiver Voltage Level
Schmitt Trigger
Interface
DIP PIN ASSIGNMENT
VCC1 1 16 VCC2
AOUT 2 15 COUT
AOUT 3 14 COUT
AIN 4 13 CIN
AIN 5 12 CIN
BOUT 6 11 VBB
BOUT 7 10 BIN
VEE 8
9 BIN
9/96
© Motorola, Inc. 1996
2–219
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
REV 6

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