(PDF) MC100ELT20 Datasheet - TTL to Differential PECL Translator

Número de pieza	MC100ELT20
Descripción	TTL to Differential PECL Translator
Fabricantes	Motorola Semiconductors
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No Preview Available ! MOTOROLA SEMICONDUCTOR TECHNICAL DATA TTL to Differential PECL Translator The MC10ELT/100ELT20 is a TTL to differential PECL translator. Because PECL (Positive ECL) levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the single gate of the ELT20 makes it ideal for those applications where space, performance and low power are at a premium. Because the mature MOSAIC 1.5 process is used, low cost can be added to the list of features. The ELT20 is available in both ECL standards: the 10ELT is compatible with positive MECL 10H logic levels while the 100ELT is compatible with positive ECL 100K logic levels. • 1.5ns Typical Propagation Delay • Differential PECL Outputs • Small Outline SOIC Package • PNP TTL Inputs for Minimal Loading • Flow Through Pinouts LOGIC DIAGRAM AND PINOUT ASSIGNMENT NC 1 Q2 PECL Q3 8 VCC TTL 7 D0 6 NC NC 4 5 GND MC10ELT20 MC100ELT20 8 1 D SUFFIX PLASTIC SOIC PACKAGE CASE 751-05 PIN DESCRIPTION PIN Q D VCC GND FUNCTION Diff PECL Outputs TTL Input +5.0V Supply Ground 1/95 © Motorola, Inc. 1996 3–1 REV 2 1 page

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PDF MC100ELT20 Data sheet ( Hoja de datos )