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PDF FDMS7650DC Data sheet ( Hoja de datos )
| Número de pieza | FDMS7650DC | |
| Descripción | N-Channel Dual Cool 56 PowerTrench MOSFET | |
| Fabricantes | Fairchild Semiconductor | |
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July 2015
FDMS7650DC
N-Channel Dual CoolTM 56 PowerTrench® MOSFET
30 V, 100 A, 0.99 mΩ
Features
General Description
Dual CoolTM Top Side Cooling PQFN package
Max rDS(on) = 0.99 mΩ at VGS = 10 V, ID = 36 A
Max rDS(on) = 1.55 mΩ at VGS = 4.5 V, ID = 32 A
High performance technology for extremely low rDS(on)
RoHS Compliant
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s advanced PowerTrench® process.
Advancements in both silicon and Dual CoolTM package
technologies have been combined to offer the lowest rDS(on)
while maintaining excellent switching performance by extremely
low Junction-to-Ambient thermal resistance.
Applications
Synchronous Rectifier for DC/DC Converters
Telecom Secondary Side Rectification
High End Server/Workstation
Pin 1
S
S
S
G
D5
D6
4G
3S
D
D
D
D
Top
Dual CoolTM 56
Bottom
MOSFET Maximum Ratings TA= 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
dv/dt
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous (Package limited)
-Continuous (Silicon limited)
-Continuous
-Pulsed
TC = 25 °C
TC = 25 °C
TA = 25 °C
Single Pulse Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
D7
D8
(Note 4)
(Note 1a)
(Note 3)
(Note 5)
(Note 1a)
2S
1S
Ratings
30
±20
100
289
47
200
578
0.5
125
3.3
-55 to +150
Units
V
V
A
mJ
V/ns
W
°C
RθJC
RθJC
RθJA
RθJA
RθJA
RθJA
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Top Source)
(Bottom Drain)
(Note 1a)
(Note 1b)
(Note 1i)
(Note 1j)
(Note 1k)
2.3
1
38
81
16
23
11
°C/W
Device Marking
7650
Device
FDMS7650DC
Package
Dual CoolTM 56
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
©2012 Fairchild Semiconductor Corporation
FDMS7650DC Rev.1.2
1
www.fairchildsemi.com
1 page  
Typical Characteristics TJ = 25 °C unless otherwise noted
10
ID = 36 A
8
6
4
2
VDD = 10 V
VDD = 15 V
VDD = 20 V
0
0 30 60 90 120 150
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
50000
10000
Ciss
Coss
1000
f = 1 MHz
VGS = 0 V
Crss
100
0.1
1 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Figure8. CapacitancevsDrain
to Source Voltage
100
40
TJ = 25 oC
10
TJ = 100 oC
TJ = 125 oC
1
0.01
0.1 1 10 100 1000 10000
tAV, TIME IN AVALANCHE (ms)
Figure9. UnclampedInductive
Switching Capability
300
RθJC = 1.0 oC/W
250
VGS = 10 V
200
VGS = 4.5 V
150
100
Limited by Package
50
0
25 50 75 100 125 150
TC, CASE TEMPERATURE (oC)
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
500
100
10
THIS AREA IS
1 LIMITED BY rDS(on)
SINGLE PULSE
0.1 TJ = MAX RATED
RθJA = 81 oC/W
TA = 25 oC
0.01
0.01
0.1
1
1 ms
10 ms
100 ms
1s
10 s
DC
10 100200
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
2000
1000
100
SINGLE PULSE
RθJA = 81 oC/W
TA = 25 oC
10
1
10-3
10-2
10-1
1
10
t, PULSE WIDTH (sec)
100 1000
Figure 12. Single Pulse Maximum
Power Dissipation
©2012 Fairchild Semiconductor Corporation
FDMS7650DC Rev.1.2
5
www.fairchildsemi.com
5 Page | ||
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| PDF Descargar | [ Datasheet FDMS7650DC.PDF ] | |
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