FDMC3020DC Datasheet PDF - Fairchild Semiconductor
Part Number | FDMC3020DC | |
Description | N-Channel Dual Cool PowerTrench MOSFET | |
Manufacturers | Fairchild Semiconductor | |
Logo | ||
There is a preview and FDMC3020DC download ( pdf file ) link at the bottom of this page. Total 8 Pages |
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N-Channel Dual CoolTM PowerTrench® MOSFET
30 V, 40 A, 6.25 mΩ
July 2012
Features
General Description
Dual CoolTM Top Side Cooling PQFN package
Max rDS(on) = 6.25 mΩ at VGS = 10 V, ID = 12 A
Max rDS(on) = 9.0 mΩ at VGS = 4.5 V, ID = 10 A
High performance technology for extremely low rDS(on)
RoHS Compliant
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s advanced PowerTrench® process.
Advancements in both silicon and Dual CoolTM package
technologies have been combined to offer the lowest rDS(on)
while maintaining excellent switching performance by extremely
low Junction-to-Ambient thermal resistance.
Applications
Synchronous Rectifier for DC/DC Converters
Telecom Secondary Side Rectification
High End Server/Workstation
Pin 1
G
S
SS
D5
D6
4G
3S
Top Power 33
D DDD
Bottom
D7
D8
2S
1S
MOSFET Maximum Ratings TA = 25°C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
dv/dt
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous (Package limited)
-Continuous (Silicon limited)
-Continuous
-Pulsed
TC = 25 °C
TC = 25 °C
TA = 25 °C
Single Pulse Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 3)
(Note 4)
(Note 1a)
Ratings
30
±20
40
70
17
100
60
1.6
50
3.0
-55 to +150
Units
V
V
A
mJ
V/ns
W
°C
RθJC
RθJC
RθJA
RθJA
RθJA
RθJA
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
Device Marking
3020
Device
FDMC3020DC
Package
Dual CoolTM Power 33
(Top Source)
(Bottom Drain)
(Note 1a)
(Note 1b)
(Note 1i)
(Note 1j)
(Note 1k)
7.9
2.5
42
105
17
26
12
Reel Size
13’’
Tape Width
12 mm
°C/W
Quantity
3000 units
©2012 Fairchild Semiconductor Corporation
FDMC3020DC Rev.C4
1
www.fairchildsemi.com
|
|
Typical Characteristics TJ = 25°C unless otherwise noted
10
ID = 12A
8
6
4
VDD = 10V
VDD = 15V
VDD = 20V
2
0
0 3 6 9 12 15 18
Qg, GATE CHARGE(nC)
Figure 7. Gate Charge Characteristics
30
10
TJ = 25oC
3000
1000
Ciss
Coss
100 f = 1MHz
VGS = 0V
Crss
30
0.1
1 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Figure8. Capacitance vs Drain
to Source Voltage
80
VGS = 10 V
RθJC = 2.5 oC/W
60
VGS = 4.5 V
40
TJ = 125oC
Limited by Package
20
1
0.01
0.1 1 10
tAV, TIME IN AVALANCHE(ms)
100
Figure9. Unclamped Inductive
Switching Capability
300
100
100 us
10 1ms
1
0.1
0.01
THIS AREA IS
LIMITED BY rDS(on)
SINGLE PULSE
TJ = MAX RATED
RθJA = 105 oC/W
TA = 25 oC
10 ms
100 ms
1s
10 s
DC
0.001
0.01 0.1 1 10 100200
VDS, DRAIN to SOURCE VOLTAGE (V)
0
25 50 75 100 125
TC, CASE TEMPERATURE (oC)
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
150
2000
1000
100
SINGLE PULSE
RθJA = 105 oC/W
TA = 25 oC
10
1
0.5
10-4 10-3 10-2 10-1
1
10
t, PULSE WIDTH (sec)
100 1000
Figure 11. Forward Bias Safe
Operating Area
Figure 12. Single Pulse Maximum
Power Dissipation
©2012 Fairchild Semiconductor Corporation
FDMC3020DC Rev.C4
5
www.fairchildsemi.com
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Information | Total 8 Pages | |
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