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XRS10L240 PDF Datasheet - SERIAL ATA II: PORT MULTIPLIER / PORT SELECTOR - Exar Corporation

Part Number XRS10L240
Description SERIAL ATA II: PORT MULTIPLIER / PORT SELECTOR
Manufacturers Exar Corporation 
Logo Exar Corporation Logo 
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XRS10L240 datasheet, circuit
EXSTOR - 1 XRS10L240
SERIAL ATA II: PORT MULTIPLIER / PORT SELECTOR
JANUARY 2009
REV. 1.05
FEATURES
GENERAL FEATURES
Six independent 3/1.5Gbps SATA ports.
Connects 2 host ports to 4 device ports.
Supports 3/1.5Gbps rate detection/speed
negotiation.
Supports power down modes - Active, partial,
slumber and power down.
Advanced features configurable through MDIO
bus.
PORT MULTIPLIER/SELECTOR LOGIC FEATURES
Low latency architecture.
Supports OOB signaling for SATA applications.
Internal OOB detectors for COMRESET/
COMINIT and COMWAKE.
I/O FEATURES
High speed outputs with programmable pre-
emphasis to drive long interconnects.
Selectable high speed input equalization for
optimum reception.
Compliant with SATA Gen-2i & Gen-2m
specification.
Enables reliable data transmission over 1 meter
or more of FR-4 and 4 meters or more of
unequalized copper cable.
Selectable spread spectrum clocking (SSC) to
reduce EMI.
PHYSICAL FEATURES
CMOS 0.13 Micron Technology
Single 1.2 V Power Supply
-40°C to 85°C Industrial Temperature Range
No heatsink or airflow required
100-Pin LQFP Package
1.0 INTRODUCTION
The XRS10L240 provides the combined advantages
of the Serial ATA II Port Selector and Port Multiplier
implementations for Serial ATA II systems at 3.0
Gbps and 1.5 Gbps. Combining the capability to
address four Serial ATA devices from one external
link with support for a failover path from two
independent hosts, the XRS10L240 offers a leading
solution for propagation of high data rate Serial ATA
products in a wide variety of applications. The
integration of Serial ATA PHY links, a variety of digital
logic capabilities, rate adjust FIFOs, integrated low-
cost clock oscillator support, test and loopback
features is achieved in a low cost and lower power
implementation.
The port selector function is used when dual hosts,
such as I/O controllers, must access single-port disk
drives in high availability storage subsystems where
redundancy and load sharing are important. The
outputs from the I/O controllers are multiplexed to a
Serial ATA drive through the port selector block of the
XRS10L240. Active/passive port selector in
XRS10L240 allows two different host ports to connect
to the same target in order to create a redundant path
to that target. In combination with RAID, the
XRS10L240 allows system providers to build fully
redundant solutions. This avoids the presence of a
single point of failure, and enables a fail-over path in
the case of host failure.
This port multiplier function is used when one active
host has to communicate with multiple SATA drives.
The XRS10L240 supports up to 4 SATA drives and
utilizes the full bandwidth of the host connection.
The XRS10L240 includes enhanced features such as
staggered HDD spin-up, power management control,
hot plug capability and support for legacy software.
The XRS10L240 acts as a retimer, maintaining
independent signaling domains between the drives,
hosts and the external interconnect.
The high-speed serial input feature: selectable
equalization and the high-speed serial output feature:
programmalbe pre-emphasis can be used to
compensate for ISI (Inter-Symbol Interference) and
increase maximum cabling distances.
XRS10L240 meets tight jitter budgets in SATA
applications. Exar's serial I/O technology enables
reliable data transmission over 1 meter or more of
FR-4 and 4 meters or more of unequalized copper
cable.
Host and drive port speeds can be mixed and
matched, based upon inherent data rate negotiation
present in the SATA II specifications.
The MDIO bus allows simple configuration of the
XRS10L240 when needed. Receive equalization,
transmit amplitude and pre-emphasis and SSC
control are all configurable via the 2-wire MDIO
interface.
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com

1 page

XRS10L240 pdf, schematic
EXSTOR - 1 XRS10L240
SERIAL ATA II: PORT MULTIPLIER / PORT SELECTOR
REV. 1.05
To summarize, the port multiplier functionality in the XRS10L240 allows the system designer to increase the
number of serial ATA connections in an enclosure that does not have a sufficient number of serial ATA
connections for all of the drives in the enclosure. The port selector functionality in the XRS10L240 allows
replacement for expensive Fibre Channel drives with cost effective and high capacity SATA drives in enterprise
class applications without compromising on redundancy or performance.
STANDARDS COMPLIANCE
The XRS10L240 is compliant with the following industry specifications:
Serial ATA, Revision 1.0a
Serial ATA II: Extensions to Serial ATA 1.0a, Revision 1.2
Serial ATA II PHY Electrical Specifications, Revision 1.0
Serial ATA II: Port Selector, Revision 1.0
Serial ATA II: Port Multiplier, Revision 1.2
Serial ATA II: Revision 2.6
APPLICATIONS
Serial ATA Enclosures
Other Serial ATA link replicator applications
Buffers for externally connected links
High density storage boxes
RAID Subsystems
APPLICATION EXAMPLE
The XRS10L240 is ideally suited for use within an external drive enclosure as a means of providing redundant
host access to ensure system availability and reliability, while enabling access to up to four target devices per
XRS10L240. This application is shown in Figure 1. Other applications for the XRS10L240 include use in fixed-
content or network attached storage systems, storage arrays, desktop applications or entry-level servers,
RAID storage or disk-to-disk backup.
2

2 Page

XRS10L240 equivalent
EXSTOR - 1 XRS10L240
REV. 1.05
2.0 PIN DESCRIPTIONS
SERIAL ATA II: PORT MULTIPLIER / PORT SELECTOR
TABLE 1: XRS10L240 PIN DESCRIPTIONS
Pin Name
Pin Number
I/O
DESCRIPTION
DATA INTERFACE
SOTP0/SOTN0
SOTP1/SOTN1
SOTP2/SOTN2
68, 69
57, 56
8, 7
CML
AC
O Coupled Serial ATA Output Transmitters. These ports communicate
from the XRS10L240 to downstream devices
SOTP3/SOTN3
19, 20
SORP0/SORN0
65, 66
SORP1/SORN1
SORP2/SORN2
60, 59
11, 10
I
Serial ATA Input Receivers. These ports receive signals
from downstream devices
SORP3/SORN3
16, 17
SITP0/SITN0
SITP1/SITN1
93, 94
82, 81
O
Serial ATA Output Transmitters. These ports communicate
from the XRS10L240 to upstream hosts.
SIRP0/SIRN0
SIRP1/SIRN1
90, 91
85, 84
I
Serial ATA Input Receivers. These ports receive signals
from upstream hosts.
CLOCK INTERFACE
CMU_REFP/
CMU_REFN
46,
47
I CML Reference clock input
AC
Coupled
XOD
43 0 Analog Crystal oscillator output
XOG
44 I Analog Crystal oscillator input, 1.26V max
MDIO INTERFACE SIGNALS
MDC
3 I LVCMOS MDIO clock input, +3.3V LVCMOS
MDIO
5 I/O LVCMOS MDIO data port, +3.3V LVCMOS. Open drain
JTAG Interface Signals
TCK
96 I LVCMOS JTAG test clock, +3.3V LVCMOS
TDI 100 I
JTAG test data in, +3.3V LVCMOS
TDO
99 O
JTAG test data out, +3.3V LVCMOS. Open drain. If used
to daisy chain JTAG devices, pull up externally using
3.3KOhm resistor.
TMS
97 I
JTAG mode select, +3.3V LVCMOS
TRST
1I
JTAG test reset, +3.3V LVCMOS. Pull low externally using
3.3KOhm resistor for normal operation of the device.
GENERAL CONTROL AND CONFIGURATION SIGNALS (CMOS)
RBIAS
49 I Analog Connection point for calibration termination resistor.
RESETB
75 I LVCMOS Active low reset pin, +3.3V LVCMOS.
5

5 Page

XRS10L240 diode, scr
EXSTOR - 1 XRS10L240
REV. 1.05
SERIAL ATA II: PORT MULTIPLIER / PORT SELECTOR
MDIO interface for register control, a JTAG interface for boundary scan purposes, and a resistor calibration
circuit complete the device. A block diagram of the XRS10L240 is shown in Figure 4.
FIGURE 4. XRS10L240 BLOCK DIAGRAM
S IR 0
SIT0
S IR 1
SIT1
SATA II
3G PHY
SATA II
3G PHY
SATA II
LINK
LAYER
PORT
SELECTOR
RATE
ADJUST
FIFO
SATA II
LINK
LAYER
SATA II
LINK
LAYER
PORT
M U LT IP LIE R
SATA II
LINK
LAYER
SATA II
LINK
LAYER
SATA II
3G PHY
SATA II
3G PHY
SATA II
3G PHY
SATA II
3G PHY
SOT0
SOR0
SOT1
SOR1
SOT2
SOR2
SOT3
SOR3
9

9 Page

XRS10L240 transistor, igbt
REV. 1.05
FIGURE 16. REPRESENTATIVE MDIO CIRCUIT
EXSTOR - 1 XRS10L240
SERIAL ATA II: PORT MULTIPLIER / PORT SELECTOR
2.5V/3.3V
Pin
To other MDIO Devices
Open Drain
Driver
Representative MDIO Read and Write waveforms are shown in Figure 17. The XRS10L240 samples MDIO on
the rising edge of MDC for input and drives MDIO after the rising edge of MDC for output. Note that setup,
hold, and output timings are defined from the maximum vIL and minimum VIH levels.
FIGURE 17. MDIO INPUT AND OUTPUT WAVEFORMS
Values for MDIO parameters are shown in Table 7
21

21 Page





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