AND8076 Datasheet PDF - ON Semiconductor

Part Number AND8076
Description A 70W Low Standby Power Supply
Manufacturers ON Semiconductor 
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AND8076 datasheet, circuit
A 70 W Low Standby
Power Supply with
the NCP120x Series
Prepared by: Christophe Basso
ON Semiconductor
The NCP1200 represents one of the cheapest solutions to
build efficient and cost-effective Switch-Mode Power
Supplies (SMPS). As this design example will show, the part
definition does not confine the component in low-power
applications only, but it can actually be used in Flyback and
Forward supplies for virtually any output power. The below
example depicts a universal mains 90-260 VAC power
supply delivering 16.5 V @ 4.5 A.
Beside its ease of implementation, the NCP1200 excels in
true low standby power designs. This application note
details how an amazing standby power of less than 100 mW
can be reached at high line with a nominal 70 W board.
DSS or Not DSS?
The Dynamic Self Supply (DSS) lets you directly drive
MOSFETs from the high-voltage rail. This option brings
you several advantages, as stated below:
True overload detection: with UC384X-based systems,
the switching oscillations are stopped in case the Vcc
line drops below a given Undervoltage Lockout level
(UVLO). This principle considers a good coupling
between the primary auxiliary winding and the power
secondary winding. Unfortunately, leakage elements
often degrade this coupling and you only can detect true
short-circuit (when Vout is close to zero) and not
overload conditions. Thanks to the DSS, the NCP1200
does not need an auxiliary information to sense an
overload condition. By detecting a current setpoint
pushed to the maximum, the internal logic takes the
decision to enter into a safe burst operation,
auto-recovering when the default leaves. Precise
overload levels can thus be implemented.
Guaranteed operation at low output levels: the Vcc
delivered by an auxiliary winding moves with the
power output level because a coupling exists between
both windings. When the supply is used in battery
charging applications, Vout can move depending on the
charging state. That is to say, when the battery is nearly
empty, its voltage can be close to zero, forcing Vout at
this level. Thanks to the natural secondary / auxiliary
reflection, the primary auxiliary winding cannot
maintain a sufficient voltage on the control IC: Vcc
collapses and puts the controller in trouble, probably
entering an hiccup mode, similar to that of a startup
sequence. DSS being decoupled from Vout, you never
see that phenomenon.
As you can see, the DSS offers interesting features but, on
the other hand, it can sometimes compromise key design
parameters. Standby power and power dissipation are one of
Standby power: the DSS standby power contribution
can easily be evaluated: VHV × Iavg with Iavg, the current
consumption taken by the controller and VHV, the
high-voltage supply rail. If Iavg equals 1 mA, then we
have a standby power of 350 mW at a 350 VDC voltage
rail. Tricks exist to slightly reduce it, like the half-wave
diode, but you will only gain between 20–30%.
Power dissipation: as stated above, all the current
consumed by the IC is seen through pin8. This is due to
the self-adaptive feature of the DSS. Should the IC
current move up or down, the DSS duty-cycle will
automatically adjust to deliver it. The controller current
depends on the internal IC consumption, but also on the
type of MOSFET connected to the output. It therefore
important to assess the total current drawn from the HV
rail and checks the right compatibility with the package
type. All details are given in the NCP1200 dedicated
data sheet and the application note AND8023/D.
As a result, the answer lies behind your design constraints.
If you would like to have a precise Over Current Protection
(OCP) trip point while driving a moderate size MOSFET,
DSS can be a good choice, provided low standby power is
not an absolute necessity. In our case, we want to drive a
large MOSFET for a better efficiency but we need to reach
the lowest possible standby power. We will thus adopt an
auxiliary winding configuration to permanently disable the
DSS. Solutions to various combinations of these constraints
are described in the application note “Tips and Tricks for the
NCP1200,” document number AND8069/D.
© Semiconductor Components Industries, LLC, 2003
April, 2003 - Rev. 2
Publication Order Number:

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AND8076 equivalent
1 Rsense
Figure 6. A Very Simple Way to Generate a
Ramp from a Square Wave Signal
Figure 7. Simulations Show a Capacitor Voltage Ramping
Up from a Few Hundred of mV Up to Nearly 5 V
From the Flyback formula, we obtain:
ǸIp +
2 @ Pout
h @ Lp @ FSW
Ip = primary peak current
N = Np / Ns = 1/0.166 = 6
Pout = output power
η = efficiency
Lp = primary inductance
Fsw = switching frequency
Vf = secondary diode forward drop
VinDC Vac Ǹ2 (neglecting ripple)
Combining equations 14, 15 and 16 we obtain an Lp value
to be in BCM at 180 VAC input voltage:
(Vout2 ) 2
[Pout @ [(N
@ Vf ) Vf2)
) N @ Vf )
@ (eff
N2 @ Vin2)
FSW]] @ 2
The numerical application gives a 484 µH inductance with
a peak current of 2.36 A. The NCP1200 incorporates a
skip-cycle feature that forces the controller to slice the
switching pattern when the power supply drives light loads.
Depending on the system time constants, the recurrence of
the burst can enter the audible frequency range. Since the
default skip-cycle takes place at one third of maximum peak
current, it is better to avoid working at high peak current in
normal operation. Should noise still appear in skip mode,
pin1 lets you select a different lower skip level
(unfortunately to the detriment of the standby power)
generating less mechanical noise. As a result, we slightly
increased the primary inductance to 700 µH to further limit
the noise in standby operation.
MOSFET Selection
The MOSFET drain voltage sees, in normal operation, a
maximum voltage of:
ǸVinDC max ) (Vout ) Vf) @ N ) Ip @
Lleak (18)
The first term represents the maximum rectified DC voltage
and goes up to 375 V. The reflected voltage pushes further
up by 101 V. Summing up these levels gives a total
steady-state drain voltage of 476 V. The last term in equation
18 depicts the leakage inductance action which further
stresses the MOSFET at the opening. If we select a 600 V
device, it leaves more than 100 V for this leakage action. A
clamping network will stop its rise anyway. A 2SK2843
from Toshiba can be a good choice. This is a TO-220 600 V
10 A component which features a 1.2 RDS(ON) @ Tj =
Ramp Compensation
With a supply entering CCM together with a duty-cycle
greater than 50%, we need to inject ramp compensation into
the controller to prevent subharmonic oscillations. An easy
way to generate a ramp, is to take the driving signal available
from pin5 and integrate it through a RC network. Figure 6
shows how to wire the components and Figure 7 shows the
signal obtain with a 18 k/ 1 nF RC time constant.
To calculate the necessary amount of ramp m, several
methods exist. We will stick to the standard one which
consists in injecting between 50 and 75% of the off-time
downslope. The calculation is as follow:
Primary off-slope:
Once reflected over Rsense, it becomes: 50.5 mV / µs (S’)
Duty-cycle in CCM:
Vin )
From Figure 6 network, the maximum voltage is given by
R and Radd1 + Radd2. With a 11 V driving voltage delivered
by the NCP1200, we recommend a 18 kfor R and 1 nF for
C. These values offer an acceptable tradeoff in terms of
power consumption but also in terms of noise immunity. The

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