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PDF SLG46140V Data sheet ( Hoja de datos )
| Número de pieza | SLG46140V | |
| Descripción | GreenPAK Programmable Mixed Signal Array | |
| Fabricantes | Silego | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de SLG46140V (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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SLG46140
GreenPAK
Programmable Mixed Signal Array
General Description
The SLG46140 GreenPAK 4 is a one-time non-volatile
memory (NVM) Programmable Mixed-Signal Matrix designed
to implement a wide variety of mixed-signal functions in a
single, small, low-power device by integrating a number of
common discrete ICs and passive components.
Features
• Logic & Mixed Signal Circuits
• Highly Versatile Macro Cells
• 1.8V (±5%) to 5V (±10%) Supply
• Operating Temperature Range: -40°C to 85°C
• RoHS Compliant / Halogen-Free
• Pb-Free: 1.6 x 2.0 x 0.55 mm, 0.4 mm pitch
Pin Configuration
VDD
GPI
GPIO
GPIO
GPIO
1
14
2
12
13
11
3 10
4
6
5
9
7
8
GPIO
GPIO
GPIO
GPIO
GND
14-pin STQFN
(Top View)
Applications
The extensive list of integrated components included in the SLG46140 can be used to implement these and many other
functions, often in combination.
• Ambient Light Detect
• Battery Charge Control
• Fan Control
• Hall Effect Drive
• LED Control
• Level Shift
• One-Shot Detect
• Optical Encode
• Over Voltage Protect
• Port Detection
• Power Sequencing
• Sensor Interface
• Signal De-Glitch
• Signal Delay
• System Reset
• Thermal Management
• Voltage Level Detect
Silego Technology, Inc.
000-0046140-065
Preliminary
Rev 0.65
Revised August 21, 2015
1 page  
SLG46140
3.0 User Programmability
The SLG46140 is a user programmable device with One-Time-Programmable (OTP) memory elements that are able to construct
combinatorial logic elements. Three of the I/O Pins provide a connection for the bit patterns into the OTP on board memory. A
programming development kit allows the user the ability to create initial devices. Once the design is finalized, the programming
code (.gpx file) is forwarded to Silego to integrate into a production process.
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Figure 1. Steps to create a custom Silego GreenPAK device
000-0046140-065
Preliminary
Page 4 of 123
5 Page 
SLG46140
5.4 Electrical Characteristics (5V ±10% VDD)
Symbol
VDD
IQ
TA
VPP
VAIR
VIH
VIL
IIH
IIL
VOH
VOL
IOH
Parameter
Supply Voltage
Quiescent Current
Operating Temperature
Programming Voltage
Analog Input Voltage Range
HIGH-Level Input Voltage
LOW-Level Input Voltage
HIGH-Level Input Current
LOW-Level Input Current
HIGH-Level Output Voltage
LOW-Level Output Voltage
HIGH-Level Output Current
Condition/Note
Static Inputs and Outputs
(when all blocks that require internal RC
OSC or bandgap are inactive)
ACMP with voltage gain divider
ACMP without voltage gain divider
Logic Input
Logic Input with Schmitt Trigger
Low-Level Logic Input
Logic Input
Logic Input with Schmitt Trigger
Low-Level Logic Input
Logic Input Pins; VIN = 5 V
Logic Input Pins; VIN = 0 V
Push-Pull 1X, Open Drain PMOS 1X,
IOH = 5 mA
Push-Pull 2X, Open Drain PMOS 2X,
IOH = 5 mA
Push-Pull 4X, Open Drain PMOS 4X,
IOH = 5 mA
Push-Pull 1X,
IOL= 5 mA
Push-Pull 2X,
IOL= 5 mA
Push-Pull 4X,
IOL= 5 mA
Open Drain NMOS 1X,
IOL= 5 mA
Open Drain NMOS 2X,
IOL= 5 mA
Open Drain NMOS 4X,
IOL= 5 mA
Push-Pull 1X, Open Drain PMOS 1X,
VOH = 2.4 V
Push-Pull 2X, Open Drain PMOS 2X,
VOH = 2.4 V
Push-Pull 4X, Open Drain PMOS 4X,
VOH = 2.4 V
Min.
4.5
Typ.
5.0
-- 1.0
-40
7.25
0
0
2.640
3.160
1.230
--
--
--
-1.0
-1.0
4.168
25
7.50
--
--
--
--
--
--
--
--
--
--
4.759
4.330 4.878
4.405 4.932
-- 0.193
-- 0.101
-- 0.071
-- 0.090
-- 0.050
-- 0.021
20.716 30.759
40.059 59.691
76.137 112.724
Max.
5.5
--
85
7.75
VDD
1.2
VDD
VDD
VDD
1.840
1.510
0.780
1.0
1.0
--
--
--
0.330
0.160
0.135
0.160
0.080
0.030
--
--
--
Unit
V
A
°C
V
V
V
V
V
V
V
V
V
A
A
V
V
V
V
V
V
V
V
V
mA
mA
mA
000-0046140-065
Preliminary
Page 10 of 123
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SLG46140V.PDF ] | |
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