1250B65 Datasheet PDF - ON Semiconductor
Part Number | 1250B65 | |
Description | Current-Mode PWM Controller | |
Manufacturers | ON Semiconductor | |
Logo | ||
There is a preview and 1250B65 download ( pdf file ) link at the bottom of this page. Total 24 Pages |
Preview 1 page No Preview Available ! NCP1250
Current-Mode PWM
Controller for Off-line
Power Supplies
The NCP1250 is a highly integrated PWM controller capable of
delivering a rugged and high performance offline power supply in a
tiny TSOP−6 or PDIP−8 package. With a supply range up to 28 V, the
controller hosts a jittered 65 kHz or 100 kHz switching circuitry
operated in peak current mode control. When the power on the
secondary side starts to decrease, the controller automatically folds
back its switching frequency down to a minimum level of 26 kHz. As
the power further goes down, the part enters skip cycle while limiting
the peak current.
Over Power Protection (OPP) is a difficult exercise especially when
no−load standby requirements drive the converter specifications. The
ON proprietary integrated OPP lets you harness the maximum
delivered power without affecting your standby performance simply
via two external resistors. An Over Voltage Protection input is also
combined on the same pin and protects the whole circuitry in case of
optocoupler failure or adverse open loop operation.
Finally, a timer−based short−circuit protection offers the best
protection scheme, letting you precisely select the protection trip point
irrespective of a loose coupling between the auxiliary and the power
windings.
Features
• Fixed−Frequency 65 or 100 kHz Current−Mode Control Operation
• Internal and Adjustable Over Power Protection (OPP) Circuit
• Frequency Foldback Down to 26 kHz and Skip−Cycle in Light Load
Conditions
• Internal Ramp Compensation
• Internal Fixed 4 ms Soft−Start
• 100 ms Timer−Based Auto−Recovery Short−Circuit Protection
• Frequency Jittering in Normal and Frequency Foldback Modes
• Option for Auto−Recovery or Latched Short−Circuit Protection
• OVP Input for Improved Robustness
• Up to 28 V VCC Operation
• +300 mA/−500 mA Source/Sink Drive Capability
• Less than 100 mW Standby Power at High Line
• EPS 2.0 Compliant
• These are Pb−Free Devices
Typical Applications
• ac−dc Converters for TVs, Set−top Boxes and Printers
• Offline Adapters for Notebooks and Netbooks
www.onsemi.com
MARKING
DIAGRAMS
TSOP−6
(SOT23−6)
SN SUFFIX
25xAYWG
1 CASE 318G
G
1
PDIP−8
SUFFIX P
Case 626
125xy65
AWL
YYWWG
25x = Specific Device Code
x = A, 2, C, D, 0, 1
y = A or B
A = Assembly Location
WL = Wafer Lot
Y, YY = Year
W, WW = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
GND 1
6 DRV
FB 2
OPP/Latch 3
5 VCC
4 CS
TSOP−6
(Top View)
GND 1
DRV 2
N/C 3
VCC 4
8 OPP/LATCH
7 N/C
6 FB
5 CS
PDIP−8
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
April, 2015 − Rev. 10
1
Publication Order Number:
NCP1250/D
|
|
NCP1250
ELECTRICAL CHARACTERISTICS
(For typical values TJ = 25°C, for min/max values TJ = −40°C to +125°C, Max TJ = 150°C, VCC = 12 V unless otherwise noted)
Symbol
Rating
Min Typ Max
SUPPLY SECTION − (For the best efficiency performance, we recommend a VCC below 20 V)
VCCON VCC increasing level at which driving pulses are authorized
VCC(min) VCC decreasing level at which driving pulses are stopped
VCCHYST Hysteresis VCCON − VCC(min)
VZENER Clamped VCC when latched off / burst mode activation @ ICC = 500 mA
ICC1 Start−up current
16 18 20
8.2 8.8 9.4
6.0
7.0
15
ICC2
Internal IC consumption with IFB = 50 mA, FSW = 65 kHz and CL = 0 nF
1.4 2.2
ICC3
Internal IC consumption with IFB = 50 mA, FSW = 65 kHz and CL = 1 nF
2.1 3.0
ICC2
Internal IC consumption with IFB = 50 mA, FSW = 100 kHz and CL = 0 nF
1.7 2.5
ICC3
Internal IC consumption with IFB = 50 mA, FSW = 100 kHz and CL = 1 nF
3.1 4.0
ICCLATCH
Current flowing into VCC pin that keeps the controller latched (Note 4)
TJ = −40°C to +125°C
TJ = 0°C to +125°C
40
32
ICCstby
Internal
FET)
IC
consumption
while
in
skip
cycle
(VCC
=
12
V,
driving
a
typical
6
A/600
V
MOS-
550
Rlim Current−limit resistor in series with the latch SCR
DRIVE OUTPUT
4.0
Tr Output voltage rise−time @ CL = 1 nF, 10−90% of output signal
Tf Output voltage fall−time @ CL = 1 nF, 10−90% of output signal
ROH
Source resistance
ROL Sink resistance
Isource Peak source current, VGS = 0 V – (Note 5)
Isink Peak sink current, VGS = 12 V – (Note 5)
VDRVlow DRV pin level at VCC close to VCC(min) with a 33 kW resistor to GND
VDRVhigh DRV pin level at VCC = 28 V – DRV unloaded
CURRENT COMPARATOR
40
30
13
6.0
300
500
8.0
10 12 14
IIB
VLimit1
VLimit2
Vfold
Vfreeze
TDEL
TLEB
TSS
Input Bias Current @ 0.8 V input level on CS Pin
Maximum internal current setpoint – TJ = 25°C – OPP/Latch Pin grounded
Maximum internal current setpoint – TJ = −40°C to 125°C – OPP/Latch Pin grounded
Default internal voltage set point for frequency foldback trip point – 45% of Vlimit
Internal peak current setpoint freeze ([31% of Vlimit)
Propagation delay from current detection to gate off−state
Leading Edge Blanking Duration
Internal soft−start duration activated upon startup, auto−recovery
0.02
0.744 0.8 0.856
0.72 0.8 0.88
357
250
100 150
300
4.0
IOPPo Setpoint decrease for the OPP/Latch pin biased to –250 mV – (Note 6)
31.3
IOOPv
IOOPv
Voltage setpoint for the OPP/Latch pin biased to −250 mV – (Note 6), TJ = 25°C
Voltage setpoint for the OPP/Latch pin biased to −250 mV – (Note 6), TJ = −40°C to
125°C
0.51 0.55 0.60
0.50 0.55 0.62
IOPPs Setpoint decrease for the OPP/Latch pin grounded
0
INTERNAL OSCILLATOR
fOSC
fOSC
Oscillation frequency (65 kHz version)
Oscillation frequency (100 kHz version)
61 65 71
92 100 108
Unit
V
V
V
V
mA
mA
mA
mA
mA
mA
mA
kW
ns
ns
W
W
mA
mA
V
V
mA
V
V
mV
mV
ns
ns
ms
%
V
V
%
kHz
kHz
www.onsemi.com
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