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PDF AK9750 Data sheet ( Hoja de datos )
| Número de pieza | AK9750 | |
| Descripción | IR Sensor IC | |
| Fabricantes | AKM | |
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[AK9750]
AK9750
IR Sensor IC with I2C I/F
1. General Description
The AK9750 is an ultra-low power and compact infrared-ray (IR) sensor module. It is composed of four
quantum IR sensors and an integrated circuit (IC) for characteristic compensation. The four IR sensors’
offset and gain variations are calibrated at shipment. An integral analog-to-digital converter provides
16-bits data outputs. Additional integrated features include a field of view limiter and an optical filter. The
AK9750 is suitable for applications including stationary human detection.
2. Features
Quantum-type IR Sensor with Four IR Elements
16-bits Digital Outputs to I2C bus
Integrated temperature sensor:
-10 ~ 60ºC output on I2C bus
Interrupt Function
INT pin can be used as a read-trigger or an interrupt request of signal level monitoring.
Built in Switch Mode (Standalone Mode)
By writing the threshold into the internal EEPROM at the customer’s production testing, the
presence detection state will be output to the INT pin. In this mode, neither the control by I2C bus
nor Host MCU is necessary.
Low Voltage Operation:
VDD: 1.71 ~ 3.63V
DVDD: 1.65V ~ VDD
Low Current Consumption:
Max. 100 µA (@Continuous Mode “0”)
Max. 1µA (@ Power down Mode)
Small and Thin Package:
10-pin SON
Built in a field of view limiter and an optical filter
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5. Pin Configurations and Functions
5.1. Pin Configurations
[AK9750]
VDD 1
CAD0 2
CAD1 3
INT 4
PDN 5
10 VSS
9 TEST
8 DVDD
7 SCL
6 SDA
5.2. Pin Functions
Top View
Figure 5.1 Pin Configurations
Table 5.1 Pin Functions
Pin
No.
Name
I/O
Function
1 VDD - Analog Power Supply Pin
2
CAD0
I
Slave address 0. CAD0 pin should be connected to VDD or VSS. Set up an address so
that two or more same address of devices do not exist on the same bus.
3
CAD1
I
Slave address 1. CAD0 pin should be connected to VDD or VSS. Set up an address so
that two or more same address of devices do not exist on the same bus.
Functions are selected by INTEN register. INT pin goes “Active”, when the ADC output
are ready to be read or the differential signal of two IR sensor(one observes the upper
4
INT
O
(or left)side and another observes lower (or right) side) exceeds threshold levels. It is
composed of an open drain output (N-type transistor). INT pin is connected to DVDD
voltage through a pull-up resister, with other open drain or open collector output of the
other devices to form “wired-OR”.
Power down pin. When PDN pin= “H”, AK9750 can operate. PDN pin is not connected
5 PDN I to VDD (or VSS) through a pull-up (or pull-down) resister. This pin must be connected
to “H” or “L” voltage level.
I2C Data Output Pin. SDA is a bidirectional pin which is used to transmit data into and
6
SDA
I/O
out of the device. It is composed of a signal input and an open drain output (N-type
transistor). SDA is connected to DVDD voltage through a pull-up resistor, and to open
drain outputs or open collector outputs of the other devices as “wired-OR”
I2C Clock Input pin. Signal processing is executed at the rising and falling edge of SCL
7 SCL I clock. Observe rise time tR and fall time tF. SCL is connected to DVDD voltage through
a pull-up resistor.
8 DVDD - Digital I/F Power Supply pin.
9 TEST I Test pin. TEST pin should be connected to VSS.
10 VSS - Ground pin.
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[AK9750]
10.2.3. AC Characteristics (1): Standard Mode (100 kHz)
(Unless otherwise specified, VDD= 1.71 ~ 3.63V, DVDD= 1.65V ~ VDD, Ta= -30 ~ 85ºC)
Parameter
Symbol Min. Typ. Max.
SCL frequency
fSCL
100
SDA bus idle time to the next
command input
fBUF
4.7
Start condition Hold time
tHD:STA 4.0
Clock Low period
tLOW
4.7
Clock High period
tHIGH
4.0
Start condition set-up time
tSU:STA 4.7
Data hold time
tHD:DAT
0
Data set-up time
tSU:DAT 250
Rise time
SDA, SCL (* 10)
SDA pin,
SCL pin
tR
1.0
Fall time
SDA, SCL (* 10)
SDA pin,
SCL pin
tF
0.3
Stop condition set-up time
tSU:STO 4.0
EEPROM write time
tWR 10
Note:
* 10. Reference data only, not tested.
10.2.4. AC Characteristics (2): Fast Mode (400 kHz)
(Unless otherwise specified, VDD= 1.71 ~ 3.63V, DVDD= 1.65V ~ VDD, Ta= -30 ~ 85ºC)
Parameter
Symbol Min. Typ. Max.
SCL frequency
fSCL
400
SDA bus idle time to the next
command input
fBUF
1.3
Start condition Hold time
tHD:STA 0.6
Clock Low period
tLOW
1.3
Clock High period
tHIGH
0.6
Start condition set-up time
tSU:STA 0.6
Data hold time
tHD:DAT
0
Data set-up time
tSU:DAT 100
Rise time
SDA, SCL (* 11)
SDA pin,
SCL pin
tR
0.3
Fall time
SDA, SCL (* 11)
SDA pin,
SCL pin
tF
0.3
Stop condition set-up time
tSU:STO 0.6
EEPROM write time
tWR 10
Note:
* 11. Reference data only, not tested.
Unit
kHz
µs
µs
µs
µs
µs
µs
ns
µs
µs
µs
ms
Unit
kHz
µs
µs
µs
µs
µs
µs
ns
µs
µs
µs
ms
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