NB3V63143G Datasheet PDF - ON Semiconductor
Part Number | NB3V63143G | |
Description | 1.8V Programmable OmniClock Generator | |
Manufacturers | ON Semiconductor | |
Logo | ||
There is a preview and NB3V63143G download ( pdf file ) link at the bottom of this page. Total 21 Pages |
Preview 1 page No Preview Available ! NB3V63143G
1.8 V Programmable
OmniClock Generator
with Single Ended (LVCMOS) and Differential
(LVDS/HCSL) Outputs with Individual Output
Enable and Individual VDDO
www.onsemi.com
The NB3V63143G, which is a member of the OmniClock family, is
a one−time programmable (OTP), low power PLL−based clock
generator that supports any output frequency from 8 kHz to 200 MHz.
The device accepts fundamental mode parallel resonant crystal or a
single ended (LVCMOS) reference clock as input. It generates either
1
QFN16
CASE 485AE
three single ended (LVCMOS) outputs, or one single ended output and
one differential (LVDS/HCSL) output. The output signals can be
MARKING DIAGRAM
modulated using the spread spectrum feature of the PLL
(programmable spread spectrum type, deviation and rate) for
applications demanding low electromagnetic interference (EMI).
Individual output enable pins OE[2:0] are available to enable/disable
3V631
43Gxx
ALYWG
G
the outputs. Individual output voltage pins VDDO[2:0] are available
to independently set the output voltage of each output. Up to four
different configurations can be written into the device memory. Two
selection pins (SEL[1:0]) allow the user to select the configuration to
use. Using the PLL bypass mode, it is possible to get a copy of the
input clock on any or all of the outputs. The device can be powered
3V63143G
xx
A
L
Y
= Specific Device Code
= Specific Program Code (Default
‘00’ for Unprogrammed Part)
= Assembly Location
= Wafer Lot
= Year
down using the Power Down pin (PD#). It is possible to program the
W
= Work Week
internal input crystal load capacitance and the output drive current
G
= Pb−Free Package
provided by the device. The device also has automatic gain control
(Note: Microdot may be in either location)
(crystal power limiting) circuitry which avoids the device overdriving
the external crystal.
ORDERING INFORMATION
See detailed ordering and shipping information on page 20 of
this data sheet.
Features
• Member of the OmniClock Family of Programmable
• Programmable Internal Crystal Load Capacitors
Clock Generators
• Operating Power Supply: 1.8 V ± 0.1 V
• Programmable Output Drive Current for Single Ended
Outputs
• I/O Standards
• Power Saving Mode through Power Down Pin
♦ Inputs: LVCMOS, Fundamental Mode Crystal
• Programmable PLL Bypass Mode
♦ Outputs: 1.8 V LVCMOS
♦ Outputs: LVDS and HCSL
• 3 Programmable Single Ended (LVCMOS) Outputs
from 8 kHz to 200 MHz
• 1 Programmable Differential Clock Output up to
200 MHz
• Input Frequency Range
• Programmable Output Inversion
• Programming and Evaluation Kit Available for Field
Programming and Quick Evaluation
• Temperature Range −40°C to 85°C
• Packaged in 16−pin QFN
• These are Pb−Free Devices
♦ Crystal: 3 MHz to 50 MHz
♦ Reference Clock: 3 MHz to 200 MHz
Typical Applications
• eBooks and Media Players
• Configurable Spread Spectrum Frequency Modulation
• Smart Wearables, Smart Phones, Portable Medical and
Parameters (Type, Deviation, Rate)
Industrial Equipment
• Individual Output Enable Pins
• Set Top Boxes, Printers, Digital Cameras and
• Independent Output Voltage Pins
Camcorders
© Semiconductor Components Industries, LLC, 2016
January, 2016 − Rev. 2
1
Publication Order Number:
NB3V63143G/D
|
|
NB3V63143G
Clock Input
Input Frequency
The clock input block can be programmed to use
a fundamental mode crystal from 3 MHz to 50 MHz or
a single ended reference clock source from 3 MHz to
200 MHz. When using output frequency modulation for
EMI reduction, for optimal performance, it is recommended
to use crystals with a frequency greater than 6.75 MHz as
input. Crystals with ESR values of up to 150 W are
supported. While using a crystal as input, it is important to
set crystal load capacitor values correctly to achieve good
performance.
Programmable Crystal Load Capacitors
The provision of internal programmable crystal load
capacitors eliminates the necessity of external load
capacitors for standard crystals. The internal load capacitors
can be programmed to any value between 4.36 pF and
20.39 pF with a step size of 0.05 pF. Refer to Table 5 for
recommended maximum load capacitor values for stable
operation. There are three modes of loading the crystal −
with internal chip capacitors only, with external capacitors
only or with the both internal and external capacitors. Check
with the crystal vendor’s load capacitance specification for
setting of the internal load capacitors. The minimum value
of 4.36 pF internal load capacitor need to be considered
while selecting external capacitor value. The internal load
capacitors will be bypassed when using an external
reference clock.
Automatic Gain Control (AGC)
The Automatic Gain Control (AGC) feature adjusts the
gain to the input clock based on its signal strength to
maintain a good quality input clock signal level. This feature
takes care of low clock swings fed from external reference
clocks and ensures proper device operation. It also enables
maximum compatibility with crystals from different
manufacturers, processes, quality and performance. AGC
also takes care of power dissipation in the crystal; avoids
overdriving the crystal and thus extending the crystal life. In
order to calculate the AGC gain accurately and avoid
increasing the jitter on the output clocks, the user needs to
provide the crystal load capacitance as well as other crystal
parameters like ESR and shunt capacitance (C0).
Programmable Clock Outputs
Output Type and Frequency
The NB3V63143G provides three independent single
ended LVCMOS outputs, or one single ended LVCMOS
output and one LVDS/HCSL differential output. The device
supports any single ended output or differential output
frequency from 8 kHz up to 200 MHz with or without
frequency modulation. All outputs have individual output
enable pins (refer to the Output Enable/Disable section on
page 7). It should be noted that certain combinations of
output frequencies and spread spectrum configurations may
not be recommended for optimal and stable operation.
For differential clocking, CLK0 and CLK1 can be
configured as LVDS or HCSL. While using differential
signaling format at the output, it is required to use only
VDDO1 as output supply and use only the OE1 pin for the
output enable function. (refer to the Application Schematic
in Figure 4). When all 3 outputs are single ended, VDDO0
and OE0 have normal functionality.
VDDO2 ≤ VDD
Crystal or
Reference
Clock Input
XIN/CLKIN
VDDO2
CLK2
XOUT
NB3V63143G VDDO1
VDDO0
Single Ended Clock
VDDO1 ≤ VDD
CLK1
CLK0
Differential Clock
LVDS/HCSL
OE2 OE0
PD# OE1
Figure 4. Application Setup for Differential Output Configuration
Programmable Output Drive
The drive strength or output current of each of the
LVCMOS clock outputs is programmable independently.
For each VDDO supply voltage, four distinct levels of
LVCMOS output drive strengths can be selected as
mentioned in DC Electrical Characteristics. This feature
provides further load drive and signal conditioning as per the
application requirement.
PLL BYPASS Mode
PLL Bypass mode can be used to buffer the input clock on
any of the outputs or all of the outputs. Any of the clock
outputs can be programmed to generate a copy of the input
clock.
www.onsemi.com
5
Preview 5 Page |
Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for NB3V63143G electronic component. |
Information | Total 21 Pages | |
Link URL | [ Copy URL to Clipboard ] | |
Download | [ NB3V63143G.PDF Datasheet ] |
Share Link :
Electronic Components Distributor
An electronic components distributor is a company that sources, stocks, and sells electronic components to manufacturers, engineers, and hobbyists. |
SparkFun Electronics | Allied Electronics | DigiKey Electronics | Arrow Electronics |
Mouser Electronics | Adafruit | Newark | Chip One Stop |
Featured Datasheets
Part Number | Description | MFRS |
NB3V63143G | The function is 1.8V Programmable OmniClock Generator. ON Semiconductor | |
Semiconductors commonly used in industry:
1N4148 |  
BAW56 |
1N5400 |
NE555 | | ||
Quick jump to:
NB3V
1N4
2N2
2SA
2SC
74H
BC
HCF
IRF
KA |