GA20JT06-CAL Datasheet PDF - GeneSiC
Part Number | GA20JT06-CAL | |
Description | OFF Silicon Carbide Junction Transistor | |
Manufacturers | GeneSiC | |
Logo | ||
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GA20JT06-CAL
Normally – OFF Silicon Carbide
Junction Transistor
Features
• 210°C maximum operating temperature
• Gate Oxide Free SiC switch
• Exceptional Safe Operating Area
• Excellent Gain Linearity
• Temperature Independent Switching Performance
• Low Output Capacitance
• Positive Temperature Co-efficient of RDS,ON
• Suitable for connecting an anti-parallel diode
VDS
RDS(ON)
ID @ 25 oC
hFE
=
=
=
=
600 V
65 mΩ
45 A
110
Die Size = 2.85 mm x 2.85 mm
Advantages
• Compatible with Si MOSFET/IGBT gate-drivers
• > 20 µs Short-Withstand Capability
• Lowest-in-class Conduction Losses
• High Circuit Efficiency
• Minimal Input Signal Distortion
• High Amplifier Bandwidth
Applications
• Down Hole Oil Drilling, Geothermal Instrumentation
• Hybrid Electric Vehicles (HEV)
• Solar Inverters
• Switched-Mode Power Supply (SMPS)
• Power Factor Correction (PFC)
• Induction Heating
• Uninterruptible Power Supply (UPS)
• Motor Drives
Absolute Maximum Ratings (TC = 25 oC unless otherwise specified)
Parameter
Symbol
Conditions
Drain – Source Voltage
Continuous Drain Current
Continuous Drain Current
Gate Peak Current
Turn-Off Safe Operating Area
Short Circuit Safe Operating Area
VDS
ID
ID
IGM
RBSOA
SCSOA
VGS = 0 V
TC = 25 °C
TC > 125°C, assumes RthJC < 0.53 oC/W
TVJ = 210 oC,
Clamped Inductive Load
TVJ = 210 oC, IG = 1 A, VDS = 400 V,
Non Repetitive
Reverse Gate – Source Voltage
Reverse Drain – Source Voltage
VGS
VDS
Operating Junction and Storage Temperature
Tj, Tstg
Maximum Processing Temperature
TProc
10 min. maximum
Values
600
45
20
1.3
ID,max = 20
@ VDS ≤ VDSmax
20
30
40
-55 to 210
325
Unit
V
A
A
A
A
µs
V
V
°C
°C
Electrical Characteristics
Parameter
Symbol
Conditions
Values
min. typ. max.
Unit
On Characteristics
Drain – Source On Resistance
Gate – Source Saturation Voltage
DC Current Gain
Off Characteristics
Drain Leakage Current
Gate – Source Leakage Current
RDS(ON)
VGS,SAT
hFE
ID = 20 A, IG = 400 mA, Tj = 25 °C
ID = 20 A, IG = 500 mA, Tj = 125 °C
ID = 20 A, IG = 1000 mA, Tj = 175 °C
ID = 20 A, IG = 1000 mA, Tj = 210 °C
D = 20 A, ID/IG = 40, Tj = 25 °C
ID = 20 A, ID/IG = 30, Tj = 175 °C
VDS = 5 V, ID = 20 A, Tj = 25 °C
VDS = 5 V, ID = 20 A, Tj = 125 °C
VDS = 5 V, ID = 20 A, Tj = 175 °C
VDS = 5 V, ID = 20 A, Tj = 210 °C
IDSS
VR = 600 V, VGS = 0 V, Tj = 25 °C
VR = 600 V, VGS = 0 V, Tj = 210 °C
IGSS
VGS = -20 V, Tj = 25 °C
65
90
110
140
3.44
3.24
110
78
73
71
10
100
20
mΩ
V
µA
nA
Feb 2015
http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/
Pg1 of 9
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Die Datasheet
GA20JT06-CAL
Ideally, IG,pon should terminate when the drain voltage falls to its on-state value in order to avoid unnecessary drive losses during the steady
on-state. In practice, the rise time of the IG,on pulse is affected by the parasitic inductances, Lpar in the device package and drive circuit. A
voltage developed across the parasitic inductance in the source path, Ls, can de-bias the gate-source junction, when high drain currents begin
to flow through the device. The voltage applied to the gate pin should be maintained high enough, above the VGS,sat (see Figure 5) level to
counter these effects.
A high negative peak current, -IG,off is recommended at the start of the turn-off transition, in order to rapidly sweep out the injected carriers from
the gate, and achieve rapid turn-off. While satisfactory turn off can be achieved with VGS = 0 V, a negative gate voltage VGS may be used in
order to speed up the turn-off transition.
Two high-speed drive topologies for the SiC SJTs are presented below.
B:1: High Speed, Low Loss Drive with Boost Capacitor, GA03IDDJT30-FR4
The GA20JT06- CAL may be driven using a High Speed, Low Loss Drive with Boost Capacitor topology in which multiple voltage levels, a
gate resistor, and a gate capacitor are used to provide fast switching current peaks at turn-on and turn-off and a continuous gate current while
in on-state. A 3 kV isolated evaluation gate drive board (GA03IDDJT30-FR4) utilizing this topology is commercially available for high and low-
side driving, its datasheet provides additional details about this drive topology.
+12 V
Gate
Signal
+12 V
VCC High
C2
U3
VGL
C5
GA03IDDJT30-FR4
Gate Driver Board
VCC High RTN
Signal
R1
U1
U2
Signal RTN
VGL
R2
VEE C6
VGL
R3
VEE
VGH
U5
C9
VEE C10
VGL
U6
VEE
D1
C8
CG1
CG2
R4
RG1
RG2
VCC Low
C1
U4
VCC Low RTN
VGH
C3
C4
VEE
Voltage Isolation Barrier
Gate IG G
D
SiC SJT S
Source
Figure 11: Topology of the GA03IDDJT30-FR4 Two Voltage Source gate driver.
The GA03IDDJT30-FR4 evaluation board comes equipped with two on board gate drive resistors (RG1, RG2) pre-installed for an effective
gate resistance3 of RG = 3.75 Ω. It may be necessary for the user to reduce RG1 and RG2 under high drain current conditions for safe
operation of the GA20JT06- CAL. The steady state current supplied to the gate pin of the GA20JT06- CAL with on-board RG = 3.75 Ω, is
shown in Figure 12. The maximum allowable safe value of RG for the user’s required drain current can be read from Figure 13.
For the GA20JT06-CAL, RG must be reduced for ID ≥ ~13 A for safe operation with the GA03IDDJT30-FR4.
For operation at ID ≥ ~13 A, RG may be calculated from the following equation, which contains the DC current gain hFE (Figure 6) and the gate-
source saturation voltage VGS,sat (Figure 5).
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=
�4.7������������
−
������������������������������������,������������������������������������ � ∗
������������������������ ∗ 1.5
ℎ������������������������ (������������,
������������������������ )
−
0.6Ω
Feb 2015
http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/
Pg5 of 9
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Information | Total 10 Pages | |
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