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PDF PI6LC48P0401 Data sheet ( Hoja de datos )

Número de pieza PI6LC48P0401
Descripción 4-Output LVPECL Networking Clock Generator
Fabricantes Pericom Semiconductor 
Logotipo Pericom Semiconductor Logotipo



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PI6LC48P0401
4-Output LVPECL Networking Clock Generator
Features
ÎÎFour differential LVPECL output pairs
ÎÎSelectable crystal oscillator interface or LVCMOS/LVTTL
single-ended clock input
ÎÎSupports the following output frequencies: 156.25MHz,
125MHz, 62.5MHz
ÎÎRMS phase jitter @ 156.25MHz, using a 25MHz crystal
(1.875MHz – 20MHz): 0.23ps (typical)
ÎÎRMS phase jitter @ 156.25MHz, using a 25MHz crystal
(12kHz – 20MHz): 0.28ps (typical)
ÎÎFull 3.3V or 2.5V supply modes
ÎÎ-40°C to 85°C ambient operating temperature
ÎÎAvailable in lead-free packages
Applications
ÎÎNetworking systems
Block Diagram
Description
The PI6LC48P0401 is a 4-output LVPECL synthesizer opti-
mized to generate Ethernet reference clock frequencies and is a
member of Pericom’s HiFlex family of high performance clock
solutions. Using a 25MHz crystal, the following frequencies can
be generated based on the settings of 2 frequency select pins
(N_SEL[1:0]): 156.25MHz, 125MHz, 62.5MHz.
The PI6LC48P0401 uses Pericom’s proprietary low phase noise
VCO technology and can achieve less than 1ps typical rms
phase jitter, so it is ideal for Ethernet interface in all kind of
systems.
N_SEL[1:0]
PLL_Bypass
XTAL_IN
XTAL_OUT
Ref_IN
IN_SEL
OSC
M_reset
2
Phase
Detector
VCO
M = 25 (fixed)
N_SEL[1:0]
0 0 ÷4
0 1 ÷5
1 0 ÷10
1 1 not used
CLK0
CLK0#
CLK1
CLK1#
CLK2
CLK2#
CLK3
CLK3#
14-0203
1 www.pericom.com PI6LC48P0401 Rev.D
11/7/2014

1 page




PI6LC48P0401 pdf
PI6LC48P0401
4-Output LVPECL Networking Clock Generator
LVPECL DC Characterisitcs, (VDD = VDDO = 3.3V ± 5%, TA = -40 to 85ºC)
Symbol Parameter
Condition
VOH Output High Voltage(1)
VDD = 3.3V
VDD = 2.5V
VOL Output Low Voltage(1)
VDD = 3.3V
VDD = 2.5V
Note: 1. LVPECL Termination: Source 150ohm to GND and 100ohm across CLK and CLK#.
Min Typ Max Units
1.9
1.1
2.4
1.6
V
1.2
0.4
1.6
0.8
V
AC Electrical Characteristics
LVPECL Termination: Source 150ohm to GND and using 0.01uF ac-coupled to 50ohm to GND
AC Characterisitcs, (VDD = VDDO = 3.3V ± 5%, TA = -40 to 85ºC)
Symbol Parameter
fOUT
tsk(o)
Output Frequency Range
Output Skew(1, 2)
tjit(Ø)
RMS Phase Jitter,
(Random)(3)
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
Condition
N_SEL[1:0] = 00
N_SEL[1:0] = 01
N_SEL[1:0] = 10
156.25MHz,
(1.875MHz - 20MHz)
156.25MHz,
(12kHz - 20MHz)
125MHz,
(1.875MHz - 20MHz)
125MHz,
(12kMHz - 20MHz)
62.5MHz,
(637kHz - 10MHz)
62.5MHz,
(12kHz - 10MHz)
20% to 80%
Min.
140
112
56
48
Typ.
0.23
0.28
0.14
0.32
0.29
0.47
Max
170
136
68
120
400
52
Units
MHz
MHz
MHz
ps
ps
ps
ps
ps
ps
ps
ps
%
Note: Electrical parameters are quaranteed over the specified ambient operating temperature range, which is established when the device is mounted in a test
socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium has been reached under these
conditions.
Note1: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the differential cross points.
Note2: This parameter is defined in accordance with JEDEC Standard 65.
Note3: Please refer to the Phase Noise Plots.
14-0203
5 www.pericom.com PI6LC48P0401 Rev.D
11/7/2014

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