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PDF PI6LC4833 Data sheet ( Hoja de datos )
| Número de pieza | PI6LC4833 | |
| Descripción | Clock Generator | |
| Fabricantes | Pericom Semiconductor | |
| Logotipo |  |
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Features
ÎÎ 2.5/3.3V supply voltage
ÎÎ4 HCSL 100/125/200/250MHz outputs with OE
ÎÎ2 LVCMOS 33/50/66/100MHz selectable outputs
ÎÎ5 LVCMOS 25MHz or 125MHz outputs
ÎÎ1 LVPECL 312.5MHz, 156.25MHz or 125MHz output
ÎÎ1 CMOS 156.25MHz or 125MHz output
ÎÎ1 LVPECL 125MHz or 25MHz output
ÎÎ25MHz crystal or differential input
ÎÎ0.5ps (typ) RMS integrated phase noise design at 3.3V
operation
ÎÎ1.0ps (typ) RMS integrated phase noise design at 2.5V
operation
ÎÎPLL Bypass mode for test
ÎÎIndustrial Temperature -40°C to 85°C
ÎÎTQFN - 56 package
Pin Configuration (56-Pin TQFN)
PI6LC4833
Clock Generator for Power PC
Description
The PI6LC4833 implements Pericom's advanced LC VCO tech-
nology and is specifically designed for Power PC network pro-
cessor (Freescale MPC8548, MPC8572, AMCC 460, AMI732).
This high performance device is optimized to generate CPU core/
PCI clock, high performance PCIe Gen1/2 Clock, SRIO, Gigabit
Ethernet’s MAC and PHY clock. All outputs are generated from
25MHz external clock input or crystal.
Application
ÎÎRouter/Switch
ÎÎOLT, BSC, WLAN, Wireless gateway
ÎÎWireless
OC-B
FB0
FB1
VCCB
QB0
QB1
VDD_OSC
X1
X2
IN+
IN-
IN_Sel
OC-R
Sel_Freq2
56 55 54 53 52 51 50 49 48 47 46 45 44 43
1 42
2 41
3 40
4 39
5 38
6 37
7
8
GND
36
35
9 34
10 33
11 32
12 31
13 30
14 29
15 16 17 18 19 20 21 22 23 24 25 26 27 28
FA1
FA0
OC-A
SS1
SS0
PLL_BYPS
VSEL_33
VCCC1
QC1
VCCC0
QC0-
QC0+
SEL_FREQ3
QC-C
All trademarks are property of their respective owners.
11-0074
1
www.pericom.com
P-0.1
06/14/11
1 page  
Sel_Freq3
0
1
NC
QCx
QCx
QCx
QC0
QC1
Output_Freq
156.25MHz
125MHz
312.5MHz
HiZ
Sel_Freq1
0
1
QD0+, QD0-
LVPECL
LVPECL
QD2, QD1
LVCMOS
LVCMOS
Output_Freq
25MHz
125MHz
Sel_Freq2
0
1
Qref2, Qref1, Qref0
LVCMOS
LVCMOS
Output_Freq
25MHz
125MHz
SS1 SS0
Spread %
00
+/- 0.25
01
-0.5
10
-0.75
11
No spread
Note: The SS1 and SS0 pins control the spread ratio of both QA and QB.
PI6LC4833
Clock Generator for Power PC
All trademarks are property of their respective owners.
11-0074
5
www.pericom.com
P-0.1
06/14/11
5 Page 
PI6LC4833
Clock Generator for Power PC
Configuration Test Load Board Termination for HCSL Output
Device
Rs
33Ω 5%
Rs
33Ω 5%
475Ω
1%
Rp
49.9Ω 1%
TLA
TLA
Rp
49.9Ω 1%
2pF
5%
Clock
Clock#
2pF
5%
Configuration Test Load Board Termination for LVPECL Output
VDD
Device
150Ω
0.1µF
0.1µF
150Ω
ZO = 50Ω
TLA
L = 0 ~ 10in
TLA
ZO = 50Ω
100Ω
All trademarks are property of their respective owners.
11-0074
11
www.pericom.com
P-0.1
06/14/11
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet PI6LC4833.PDF ] | |
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