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PDF PI6LC4820 Data sheet ( Hoja de datos )
| Número de pieza | PI6LC4820 | |
| Descripción | Ethernet Network Clock Generator | |
| Fabricantes | Pericom Semiconductor | |
| Logotipo |  |
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PI6LC4820
HiFlexTM Ethernet Network Clock Generator
Features
ÎÎ3.3V supply voltage
ÎÎCrystal input: 25 MHz
ÎÎDifferential input: 25MHz, 156.25 MHz
ÎÎOutput frequencies of 312.5, 156.25, 125MHz supported
ÎÎ9 LVPECL or LVDS bank selectable outputs
ÎÎLow 1ps max integrated phase noise design
(12kHz to 20MHz)
ÎÎOptional xtal or clock input selection
ÎÎPLL Bypass mode for test
ÎÎPower supply noise rejection: -50 dBc typical @ 156.25 MHz
ÎÎPackaging (Pb-free & Green): 48-lead 7×7mm TQFN
Description
The PI6LC4820 is an LC VCO based low phase noise design
intended for 10GbE applications. Typical 10GbE usage assumes
a 25Mhz crystal input, while the PLL loop is used to generate
the 156.25MHz outputs. An additional buffered crystal oscilla-
tor output is provided to serve as a low noise reference for other
circuitry.
For Ethernet applications other than 10GbE, programmable
dividers allow for simultaneous output of 312.5, 156.25, and
125MHz.
Pin Configuration
FS0
X1
X2
VDD_OSC
IN_SEL
PLL_BYPS
GND
FS1
QC_Mode
VDDA
GND
VDD_PLL
48 47 46 45 44 43 42 41 40 39 38 37
1 36
2 35
3 34
4 33
5 32
6 GND 31
7 30
8 29
9 28
10 27
11 26
12 25
13 14 15 16 17 18 19 20 21 22 23 24
VDD_QA
QA0+
QA0-
QA1+
QA1-
QA2+
QA2-
QA3+
QA3-
QA4+
QA4-
VDD_QA
13-0167
1
PI6LC4820 Rev D
11/13/13
1 page  
PLL Feedback Divider Control Table
FS1 Feedback Divider Ratio
0 25
1 20
Output Frequency Control Table
FS_A
0
1
NC
FS_B
0
1
NC
FS_C
0
1
NC
Bank A Output Control
QA_Mode0
0
1
NC
QA[2:0]
LVDS
LVPECL
Hi-Z
QA_Mode1
0
1
NC
Bank B Output Control
QB_Mode
0
1
NC
QB[2:0]
LVDS
LVPECL
Hi-Z
PI6LC4820
HiFlexTM Ethernet Network Clock Generator
Output Frequency
156.25
125
312.5
QA[4:3]
LVDS
LVPECL
Hi-Z
C-bank Output Interface Control Configuration
QC_Mode
0
1
NC
QC+/-
LVDS
LVPECL
Hi-Z
13-0167
5
PI6LC4820 Rev D
11/13/13
5 Page 
PI6LC4820
HiFlexTM Ethernet Network Clock Generator
Crystal circuit connection
The following diagram shows PI6LC4820 crystal circuit connection with a parallel crystal. For the CL=18pF crystal, it is suggested
to use C1=27pF, C2=33pF. C1 and C2 can be adjusted to fine tune to the target ppm of crystal oscillator according to different board
layouts.
Crystal Oscillator Circuit
SaRonix-eCera
GC2500076B
C1
27pF
Crystal�(CL�=�18pF)
C2
33pF
X1
X2
Crystal Circuit O2s.ciPllaI6tLoCr 4820 Crystal Circuit Layout Guide
Pin name
1 FS0
2 X1
3 X2
4 VDD_OSC
5 IN_SEL
6 PLL-BYBS
7 GND
8 FS1
C1 cap. pad
Crystal pad
GND Pad
GND via
Board via
keep out area
PCB Layers:
L_1 Signal (Top)
L_2 GND plane
Solder pad
4 Copyright Pericom Semiconductor 2007 PERICOM CONFIDENTIAL INFORMATION
Recommended Crystal Specification
Last Slide
Pericom recommends:
a) GC2500003 XTAL 49S/SMD(4.0 mm), 25M, CL=18pF, +/-30ppm, http://www.pericom.com/pdf/datasheets/se/GC_GF.pdf
b) FY2500081, SMD 5x3.2(4P), 25M, CL=18pF, +/-30ppm, http://www.pericom.com/pdf/datasheets/se/FY_F9.pdf
c) FL2500047, SMD 3.2x2.5(4P), 25M, CL=18pF, +/-20ppm, http://www.pericom.com/pdf/datasheets/se/FL.pdf
13-0167
11
PI6LC4820 Rev D
11/13/13
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet PI6LC4820.PDF ] | |
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